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Wednesday, 01/11/2017 1:55:18 PM

Wednesday, January 11, 2017 1:55:18 PM

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http://blogs.barrons.com/techtraderdaily/2016/11/25/intels-still-ahead-of-the-pack-in-chip-process-says-linley-group/

Intel’s Still Ahead of the Pack in Chip Process, Says Linley Group

In an editorial this week by Linley Gwennap, the head of the eponymous research firm Linley Group, Intel (INTC) comes out as still ahead of foundries Taiwan Semi (TSM) and Samsung Electronics (005930KS), no matter what the marketing spin the latter spout.

(Paid subscription required to read Linley Group research.)

Gwennap notes that foundries such as TSM stopped following standard nomenclature for naming their new chip manufacturing technology several years ago. The result is that new advances claimed by Taiwan Semi and Samsung, and by Global Foundries, aren’t what they seem, and aren’t ahead of Intel.

TSM, for example, is moving to “10-nanometer” chip production, and already designing its “7-nanometer” techniques. But, whereas in past these advances doubled the density of transistors with each step, today’s “nodes” in some cases bring little or no transistor density increases, he observes.

As Gwennap writes, around the time of 45-nanometer chips, “the marketing team decided the node label didn’t need to be a strict indicator of den- sity, which is based on measurable parameters such as metal pitch, gate pitch, and SRAM-cell size.”

As Gwennap sees it, the “16-nanometer” technology of TSM and the others “is really 19-nanometer,” and the planned 7 nanometer “will be about 13-nanometer relative to Intel processes.” Intel, he concludes, is a “a full node” ahead of the foundries, “Just as they have been for the past decade.”

Gwennap argues that past 5 nanometers, where there’s “no clear plan” in industry as to how to proceed, “Intel will likely be the first company to find” the physical limits to further scaling of transistors.
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