Advanced Micro Devices Inc (AMD)

[Elmer Phud]

ChipGuy - Thanks for the explanation but what I meant was the term "sub-block redundancy" as opposed to "row and column redundancy" was a new concept to me. How does it differ?

A more complex and realistic example has to include Poisson
probability of multiple defects and the ability to repair more
than one defect.

Let us also note that if we assume that defect density is particle driven with random distribution, then a wafer with X die and X/2 defects will result is over 50% logic yield because some die will capture more than one of those defects. This brings us to the question of AMD's low output of Opterons. These guys aren't flakes and we must assume they have their particulate defect density under control, so how do we explain the low output? I have my ideas but I'd like to hear your's.