Monday, June 27, 2016 9:01:37 AM
We are using FPGAs for ASIC prototyping. For many years, we were using Altera, simply because they had the best solution for ASIC prototyping in the market and usually the FPGAs with the highest logic element density. Now, we are, again, at the limit of what the current Altera FPGAs can contain as logic. So, Altera, now Intel, has announced the Stratix 10 since when? A year ago? Now it is shifted to next year, open end. Now we are seriously considering using Xilinx, even though it would cause a huge effort to adapt to the new tools and boards.
Just as a reminder how competitive this industry is and what a delay of 1-2 years does to your market share. Intel better hurry, or they have one more expensive acquisition screwed up ...
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