Rambus (RMBS)

[smd1234]

TJ CAL ALL

tj - thanks much. there was some discussion in the yahoo thread skip started, but I did not follow it

first post is for Cal to read, 2nd is for all:
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Re: Magnetic Storage
by: infringeon2003 07/10/06 09:02 pm
Msg: 1032725 of 1032728

The Alberta patent failed to reference the Heller patent which antedates it and is prior art to it. The Alberta patent should have referenced this but it did not. For that reason it is defective. But that is not the only reason.

RDRAM only has to meet the incoming and outgoing clock timing constraints of the memory chip closest to the midpoint. All other memory chips have relaxed timing contraints. Thus there is no need to compute the midpoint of the clock interval if all the chip operations can be completed refenced to the incoming and outgoing clok alignment circuits.

It is only neccessary for the incomming and outgoing clock alignment circuits to be efficient and anticipatory. This accomplished with a variable delay line that achieve full anticipation.

As you may know the speed of light in space is 1 ft per nanosecond. In a copper wire it is approximately .65 ft per nanosecond.


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Subj: News from the court...
By: infringeon2003
Date: 07/10/06 09:07 pm

Tomorrow bfore regular sesion I will post an update on what is happening in the federal court.

It is very interesting and significant.

It will take me a while to do this and tomorrow is soon enough.

Longs...you can sleep tight!