Advanced Micro Devices Inc (AMD)

[wbmw]

CJ, Re: Slide 69. 4 processors per board, 4 NIC/router chips per board.

Assuming that these are the ASIC chips and not standard network interface cards, then it still doesn't imply that 200 series Opterons will be used instead of 800 series Opterons. The extra Hypertransport link could be used for cross-CPU bandwidth, thus improving performance. I'll admit, however, that my theory isn't so strong anymore, assuming once again that NIC/router is Sandia's term for system interconnect.

Also, I think it's interesting to check out slide 53, which lists the relative performance on Sandia's apps. I find it surprising that Power4 and Itanium 2 both receive lousy scores on this benchmark, but it is nice to see that Sandia did their due diligence here. Based on other HPC apps that I have seen, I would have thought that Power4 and Itanium 2 would achieve close to what EV7 could get, but on the other hand, applications are not all created equal. There are simply some issues in the micro-architecture of a CPU that will allow it to perform faster or slower in some situations, and Itanium 2 is clearly not the solution for this project (at least, not without some major fine-tuning of the CTH and Alegra applications).