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mas

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mas

Re: ibc post# 141135

Friday, 06/05/2015 1:44:02 PM

Friday, June 05, 2015 1:44:02 PM

Post# of 151638
I'm pretty sure the Intel architects know more than you do.

Absolutely, however only in the last year or so have they seen the tremendous improvement RISC chips have made in throughput per chip to start thinking of countering. It takes 3-4 years for an architectural response to be incorporated so 4-way SMT could well be coming down the line.

It would not surprise me one bit to see Broxton go back to 1-thread per core.

Silvermont/Airmont already did this although Gen 1 Atom clearly showed the benefit of SMT even in tablet/phone usage.
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