Monday, April 27, 2015 12:40:06 PM
RTL is register transfer level, a way to describe digital hardware with hardware description languages like VHDL or Verilog. In that case, this should be a power simulation with a 16nm TSMC library (after synthesis, hopefully).
What does it mean? Well, ARM compares a power simulation of their cores (with caches and memory system) to a full Intel SoC. At the same time, they let the Core M throttle in multi thread benchmarks (they certainly don't throttle in their simulation) and it seems they are using GCC for compilation also for the Intel core. What about using the Intel compiler and their ARM compiler? In addition, they compare a 2 GHz Core M with a 2.5 GHz A72.
So, what's the bottom line? Their 2016 CPU design will be slower than Core M clock by clock (and most definitely core by core). So, performance wise, they have about 1/3 of the computing performance at the same clock and core count as Intel in a design that can hardly go beyond 3GHz at 14nm I suspect. Intel has 4GHz+ cores (that scale well in performance with increasing clock, which is an art for itself). Where ARM shines, as always, is in power consumption - not something Intel's core was designed for. In terms of performance, ARM has a looong way to go.
Interestingly, they made the core wider but particularly mention their optimizations of the cache controller and branch prediction. That is the stuff where things get really complicated and they won't have these large performance improvements in the future anymore (it's slowing down already).
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