Intel Corp (INTC)

[Unkwn]

I'd love to learn what kind of magic they found to achieve this claim. Typically, performance on modern CPU is derived by increasing the OOOE window, extracting instruction level parallelism through wider superscalar design, reducing memory latency, and increasing memory bandwidth.

I don't think this is that black and white actually. You sure can optimize a lot of things regarding power, for example more sophisticated and clever clock gating, optimized designs to reduce the usage of flip flops, gating of logic pathes etc. You can even use power gating to some extent, if you really know what you are doing. Additionally, you could create islands with different cells which are slower but lower power, as long as timing of these islands isn't that critical. Sure, most of that stuff can't be done on the IP/logic side, but it can be done using hard macros and that's what I understood ARM is going for. Surely, that's a domain where Intel has quite some expertise at (hand optimized layouts and stuff), so stay tuned ...

I actually find this comment much more interesting:

I'm talking about a range of decent sized, representative workloads, not micro-benchmarks.'

There's much room for interpretation here, but to me it seems as AMD is saying: In real work load scenarios, ARM's cores suck a bit. Looks like their server ambitions hit reality

How does A57 compare to Silvermont in SpecInt by the way, now that we have numbers?