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Re: chipguy post# 138713

Wednesday, 01/07/2015 3:58:10 PM

Wednesday, January 07, 2015 3:58:10 PM

Post# of 151698
Chipguy,
You are our resident expert on this topic along with some others.
This was a tick. Did Intel not achieve lower geometry and low power with this tick process? What were you expecting that you did not see.
It appears that die size significantly lower and Intel will get a lot more good chips per wafer. It appears these low power chips-come down from 15w to 4.5w range.
I would like to hear your technical explanation for this.
thanks.
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