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chipguy

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chipguy

Re: ibc post# 137545

Wednesday, 10/22/2014 3:38:34 PM

Wednesday, October 22, 2014 3:38:34 PM

Post# of 151682
the IBM design also features a record 15 levels of copper interconnect to give circuit designers more freedom that ever before to distribute power and clock signals efficiently across an entire SoC chip, which may be as large as 600mm2

LOL, going for Tredennick's infinite price, zero volume IC market.

Aside from IBM mainframe hostages who pay a million bucks plus
per CPU, who can afford 15LM 600 mm2 chips?
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