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Re: doughjo post# 44851

Wednesday, 04/05/2006 9:14:15 PM

Wednesday, April 05, 2006 9:14:15 PM

Post# of 78729
doughjo: Re: What questions would be asking management?

I can think of a few right off the top of my head.

Some general topic stingers:

1) How can you present yourselves as a credible semiconductor company when you spend 3 times more on salaries and bonuses for 4 employees than you do on R&D? (source: 10-K and 10-Q)

2) How can you present yourselves as a credible semiconductor company when you present faked pictures of you product?

3) How can we have confidence in your leadership as you ask to drastically increase the AS in order to obtain financing when last year, you spent only $360,000 of the $4.6 million raised on R&D yet you spent three times that on salaries and bonuses?

4) Why did you re-strike the warrant conversion price?

5) What did Brad do last year to deserve a $70,000 bonus?

6) Why were the proceeds from SIL that went through TSP never openly accounted for? Recall that you promised in a RAQ that the TSP books would be made public so that there could be no question that the SIL funds were distributed properly.

7) Every Consolidate Statement of Cash Flows in the filings contains a cash expense catagory entitled "Compensatory Elements of Stock Issuance". This single catagory is always the largest cash expense, yet details are never provided as to what these "compensatory elements of stock issuance" really are. Please explain.

Some technical questions:

1) What make and model FPGA does your prototype use?

2) Since you have been talking to asian chip manufacturers, I assume that you have selected a design and manufacturing process for the ASIC. What design rules will the ASIC be manufactured on?

3) How many layers will the ASIC require?

4) How many masks per set do you anticipate the design will require?

5) How many mask sets will be required?

6) Since you claim that the FPGA operates in "loopback mode", I am confused as to how a customer could test in on actual lines. How is this possible? Is the FPGA even intended for actual testing?

7) The reference board pictured in the Embarq PDF flyer has a slot for an RF card. This is used for wireless communications, not the type of technology that you are claiming. What is the purpose of this RF card slot?

8) The Hellosoft web site has a picture of a wireless LAN reference board that appears almost identical to your FPGA reference board pictured in the flyer. I find it highly unlikely that such a reference board would be suitable as both a WLAN and DSL development platform. Is the picture in the flyer genuine, or is it yet another fake?

9) You claim that customers have been evaluating Embarq since its release in December. You also claimed that customers evaluated the alptop prototype released three years ago, yet we never heard anything from them. Can we expect the same this time?

That'd be a good start.

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