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Intel Re-architects the Fundamental Building Block for High-Performance Computing
Next-Generation Intel® Xeon Phi™ Processor with Integrated Intel® Omni Scale Fabric to Deliver Up to 3 Times the Performance of Previous Generation at Lower Power
http://newsroom.intel.com/community/intel_newsroom/blog/2014/06/23/intel-re-architects-the-fundamental-building-block-for-high-performance-computing
http://www.intel.com/content/www/us/en/processors/xeon-phi/intel-parallel-computing-centers-overview-video.html?wapkw=intel+parallel+computing+centers
http://newsroom.intel.com/servlet/JiveServlet/download/7954-32805/ISC14_Raj_Hazra_keynote.pdf
NEWS HIGHLIGHTS
Announces new microarchitecture and memory details of the next-generation Intel® Xeon Phi™ processor (code-named Knights Landing), scheduled to power HPC systems in the second half of 2015.
Intel® Omni Scale Fabric– an end-to-end interconnect optimized for fast data transfers, reduced latencies and higher efficiency – initially available as discreet components in 2015, will also be integrated into next-generation Intel Xeon Phi processor (Knights Landing) and future 14nm Intel® Xeon® processors.
Intel continues to lead in HPC segment with 85 percent of all supercomputers on the latest TOP500* list powered by Intel Xeon processors.
INTERNATIONAL SUPERCOMPUTING CONFERENCE (ISC), Leipzig, Germany, June 23, 2014 –
Intel Corporation today announced new details for its next-generation Intel® Xeon Phi™ processors, code-named Knights Landing, which promise to extend the benefits of code modernization investments being made for current generation products. These include a new high-speed fabric that will be integrated on-package and high-bandwidth, on-package memory that combined, promise to accelerate the rate of scientific discovery. Currently memory and fabrics are available as discrete components in servers limiting the performance and density of supercomputers.
The new interconnect technology, called Intel® Omni Scale Fabric, is designed to address the requirements of the next generations of high-performance computing (HPC). Intel Omni Scale Fabric will be integrated in the next generation of Intel Xeon Phi processors as well as future general-purpose Intel® Xeon® processors. This integration along with the fabric's HPC-optimized architecture is designed to address the performance, scalability, reliability, power and density requirements of future HPC deployments. It is designed to balance price and performance for entry-level through extreme-scale deployments.
"Intel is re-architecting the fundamental building block of HPC systems by integrating the Intel Omni Scale Fabric into Knights Landing, marking a significant inflection and milestone for the HPC industry," said Charles Wuischpard, vice president and general manager of Workstations and HPC at Intel. "Knights Landing will be the first true many-core processor to address today's memory and I/O performance challenges. It will allow programmers to leverage existing code and standard programming models to achieve significant performance gains on a wide set of applications. Its platform design, programming model and balanced performance makes it the first viable step towards exascale."
Knights Landing – Unmatched Integration
Knights Landing will be available as a standalone processor mounted directly on the motherboard socket in addition to the PCIe-based card option. The socketed option removes programming complexities and bandwidth bottlenecks of data transfer over PCIe, common in GPU and accelerator solutions. Knights Landing will include up to16GB high-bandwidth, on-package memory at launch – designed in partnership with Micron* – to deliver five times better bandwidth compared to DDR4 memory1, five times better energy efficiency2 and three times more density2 than current GDDR-based memory. When combined with integrated Intel Omni Scale Fabric, the new memory solution will allow Knights Landing to be installed as an independent compute building block, saving space and energy by reducing the number of components.
Powered by more than 60 HPC-enhanced Silvermont architecture-based cores, Knights Landing is expected to deliver more than 3 TFLOPS of double-precision performance3 and three times the single-threaded performance4 compared with the current generation. As a standalone server processor, Knights Landing will support DDR4 system memory comparable in capacity and bandwidth to Intel Xeon processor-based platforms, enabling applications that have a much larger memory footprint. Knights Landing will be binary-compatible with Intel Xeon processors5, making it easy for software developers to reuse the wealth of existing code.
For customers preferring discrete components and a fast upgrade path without needing to upgrade other system components, both Knights Landing and Intel Omni Scale Fabric controllers will be available as separate PCIe-based add-on cards. There is application compatibility between currently available Intel® True Scale Fabric and future Intel Omni Scale Fabric, so customers can transition to new fabric technology without change to their applications. For customers purchasing Intel True Scale Fabric today, Intel will offer a program to upgrade to Intel Omni Scale Fabric when it's available.
Knights Landing processors are scheduled to power HPC systems in the second half of 2015. For instance, in April the National Energy Research Scientific Computing Center (NERSC) announced an HPC installation planned for 2016, serving more than 5,000 users and over 700 extreme-scale science projects.
"We are excited about our partnership with Cray and Intel to develop NERSC's next supercomputer 'Cori,'" said Dr. Sudip Dosanjh, NERSC Director, Lawrence Berkeley National Laboratory. "Cori will consist of over 9,300 Intel Knights Landing processors and will serve as an on-ramp to exascale for our users through an accessible programming model. Our codes, which are often memory-bandwidth limited, will also greatly benefit from Knights Landing's high speed on package memory. We look forward to enabling new science that cannot be done on today's supercomputers."
New Fabric, New Speeds with Intel Omni Scale Fabric
Intel Omni Scale fabric is built upon a combination of enhanced acquired IP from Cray and QLogic, and Intel's own in-house innovations. It will include a full product line offering consisting of adapters, edge switches, director switch systems, and open-source fabric management and software tools. Additionally, traditional electrical transceivers in the director switches in today's fabrics will be replaced by Intel® Silicon Photonics-based solutions, enabling increased port density, simplified cabling and reduced costs6. Intel Silicon Photonics-based cabling and transceiver solutions may also be used with Intel Omni Scale-based processors, adapter cards and edge switches.
Intel Supercomputing Momentum Continues
The current generation of Intel Xeon processors and Intel Xeon Phi coprocessors powers the top-rated system in the world – the 35 PFLOPS "Milky Way 2" in China. Intel Xeon Phi coprocessors are also available in more than 200 OEM designs worldwide.
Intel-based systems account for 85 percent of all supercomputers on the 43rd edition of the TOP500 list announced today and 97 percent of all new additions. Within 18 months after the introduction of Intel's first many-core architecture products, Intel Xeon Phi coprocessor-based systems already make up 18 percent of the aggregated performance of all TOP500 supercomputers. The complete TOP500 list is available at www.top500.org.
To help optimize applications for many-core processing, Intel has also established more than 30 Intel Parallel Computing Centers (IPCC) in cooperation with universities and research facilities around the world. Today's parallel optimization investment with the Intel Xeon Phi coprocessor will carry forward to Knights Landing, as optimizations using standards-based, common programming languages persist with a recompile. Incremental tuning gains will be available to take advantage of innovative new functionality.
Four-Core Power8 Box For Entry IBM i Shops Ships Early
http://www.itjungle.com/tfh/tfh061614-story01.html
Assuming the relative performance difference between a four-core and six-core Power8 machine is the same as with a Power7+ machine, then simple algebra suggests the Power S814 with all four cores running at 3.02 GHz will provide around 39,800 units of performance on IBM's Commercial Performance Workload benchmark test, which is a 40 percent increase in performance. Some of that performance, as you learned a few weeks ago, is due to the increased threading on the processor, some is due to more cache and other improvements in the Power8 core. Yes, I know that it doesn't make intuitive sense that slower cores should have such a big speed bump. But that is precisely what happened in the jump from Power6 to Power7, so this is the way IBM likes to roll.
The four-core Power S814 machine will be available on June 24. I am trying to get formal system pricing and performance figures so I can do proper comparisons for you. Stay tuned.
Power8 Systems Added To Long-Running Trade-In Deal
http://www.itjungle.com/tfh/tfh061614-story06.html
Actually I was being optimistic about 7nm as that may require octuple patterning on 193nm immersion lithography so 10nm is the last relatively easy node economically with double/quadruple patterning which means Intel needs to make progress on 7nm in 5-6 years otherwise the foundries start catching up. I have always thought that Intel's 10nm tock products would deliver the coup de grâce to the opposition in 2018, just need to make sure now there will be timely successors to them.
http://semiengineering.com/what-if-euv-fails/
In any case, each chipmaker has its own strategy. Intel, for one, has been embracing a pitch-splitting concept called complementary lithography. “Gradually, we’ve implemented increasingly strict design rules to the point that our layouts are unidirectional,” said Mark Phillips, engineering manager for lithography at Intel. “They have good features. The point is that it is not just beneficial for lithographers, but it’s also beneficial in process control.”
Intel’s concept involves a two-step process—gratings and line cuts—to pattern designs. Up until 7nm, Intel plans to use 193nm immersion to make both the gratings and cuts. Then, at 7nm, 193nm immersion would still be used to make the gratings, while EUV or multibeam would be inserted to make the cuts in order to lower the costs.
But if EUV and multibeam happen to miss the 7nm node, the process becomes more expensive and complex. “If you do (the cuts) with 193nm immersion, you have to split up all of these cuts. So you are looking at a single metal via pattern with nine masks to pattern. I don’t think this is a series of easy steps,” Phillips said.
Others have a different strategy. For example, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) wants to insert EUV at 10nm, but it will likely use 193nm immersion and multiple pattering. “TSMC’s 10nm plan is to use litho-etch-litho-etch for the metal one and via layers and SADP where they can, such as the fins and poly,” lithography expert Mack said. “It is a plan that will work. The only thing that might not work is the economics. We have to wait and see about that.”
At 7nm, there are a multitude of possibilities for chipmakers. In one scenario, Gerry Luk-Pat, senior staff engineer at Synopsys, envisioned the following scheme at 7nm: “For the fin layer, we are going to evolve from self-aligned double to self-aligned quadruple. For metal one, we can stay on triple patterning. For metal two and metal x, we will move from self-aligned double patterning to triple patterning. The trim mask itself will need multiple patterning.”
That's one seriously long range chart .
Like I noticed on Yahoo the chart is really strong now. Every moving average up to the 477 week moving average (9 years ago !) is under the stock and adding upward pressure very day. Even I am surprised how quickly it is eating through the resistance in the 3s.
This is the crucial dilemma facing all semiconductor chip makers. Intel is alright probably down to 7nm with maybe quad-patterning but what then ? 7nm tips up in say 2018-2019 and is say good for maybe 3-4 years until the foundries catch up. So in 9 years max Intel needs to have developed progress to 5nm and smaller. It is not a given that Intel will a) do this b) even if it does, be ahead of the foundries. If Moore's law really stops then all chips will become cheap commodities eventually with the resultant negative effect on all chip designers and makers. A new switching mechanism will then be required for further computational progress.
Probably an unlocked K-series multi-threaded i3 would not go amiss to totally beat the 4 integer core AMD opposition in threaded apps. For $75 and overclocked you are basically getting 4 times the performance of a $25 mobile chip at least in single-thread.
I can accept that game consoles will be casualties of tablets/phones eventually but hard-core gamers have always used high-spec PCs and always will unless a disruptive new device is born. The fact that AMD console chips are basically medium-spec x86 PC chips shows who won that war.
"The PC will be the new accessory to mobile as smartphones become the first and primary computing device for many."
BS. Perhaps you might want to dig out IDC's Itanium and ARM PC/server forecasts that were also incredibly wrong too. Anybody who is using a cpu for computing as opposed to an entertainment/communication device will invariably buy a PC with a decent size screen. Smartphone growth is mainly happening on dumb phone extinction but once that trend is complete it will be revealed that smartphone growth was purely driven by communication needs and not computing ones.
The space business was sacrificed to give them guaranteed employment for years to come, I think that is more than a fair trade for handing in some illiquid shares in a private company. At least with ASTC shares they have a chance to sell them going forward. Trey is getting compensated in another fashion (check my 2nd link), ~$700K for doing this deal as apparently it is a change of control even though he still remains CEO of Astrotech .
I am not sure any money changed hands except for paying off the State of Texas.
'Many of these shares will be used to compensate those hardworking employees who will no longer own stock in 1st Detect and Astrogenetix.'
What exactly do you mean by share manipulation ? Examples ?
Indeed it does! Astrotech Completes Internal Reorganization to Own 100% of Subsidiary Equity
http://ih.advfn.com/p.php?pid=nmona&article=62533019
Astrotech Corporation (Nasdaq:ASTC), a leading provider of commercial aerospace services, today announced that it has completed an internal reorganization and will now own 100% of its subsidiary companies 1st Detect Corporation ("1st Detect") and Astrogenetix Inc. ("Astrogenetix"), in which it had previously issued equity grants to employees.
"This transaction was the right thing to do for our shareholders," said Thomas B. Pickens III, Chairman and CEO of Astrotech. "The subsidiary equity grants were meant to incentivize our employees, however we found that it caused confusion and uncertainty among our shareholders, so we have now simplified our corporate structure."
This transaction will restore the ownership by Astrotech shareholders of 100% of the subsidiary companies. Previously, Astrotech Corporation owned 86.4% and 83.6% of 1st Detect and Astrogenetix, respectively.
In connection with the Annual Shareholders Meeting scheduled for June 26th, the company asked its shareholder to authorize additional shares in Astrotech Corporation to be used for future incentive compensation. Many of these shares will be used to compensate those hardworking employees who will no longer own stock in 1st Detect and Astrogenetix.
Activities of Astrotech Following the Asset Sale
http://ih.advfn.com/p.php?pid=nmona&article=62536130
If the Asset Sale is completed, all of our assets related to or used in the ASO Business will be sold, and Buyer will be the sole beneficiary of any future earnings from those assets. The proceeds from the Asset Sale will be used to pay off our outstanding indebtedness under our financing facility and to repay Texas Emerging Technology Fund for the investment it made in 1st Detect. In addition, we will pay for all costs related to the transaction, including taxes, legal fees and filing fees. Finally, we will incur ongoing operating costs as we grow 1st Detect and other operations under our Spacetech Business.
Additionally, while we expect to continue to sell mass spectrometer units as we continue to expand the commercialization of our 1st Detect technology, we also plan to sell data analytic and predictive analytic solutions that will be available real-time in the Cloud.
To date, 1st Detect’s miniaturized mass spectrometer has been in a research and development phase. With our first commercial contract announced on January 29, 2014, with Rigaku, our goal is to position 1st Detect to grow and become a profitable component of the Company’s business. As 1st Detect transitions into manufacturing, capital will be required for market specific R&D, full scale manufacturing, inventory and marketing. While we have identified and started to approach our target markets, with the additional capital, we will have the ability to more aggressively penetrate the following target markets:
•
Pharmaceutical manufacturing
•
Semiconductor manufacturing
•
Chemical processing
•
Food & beverage manufacturing
•
Environmental
•
Airport security
•
Military
•
Water & wastewater
•
First responders
•
Healthcare
•
Critical infrastructure
Astrotech Corporation, our corporate structure, our public reporting obligations and the listing of our common stock on the NASDAQ Capital Market under the symbol ASTC will not be affected as a result of completing the Asset Sale.
If the Asset Sale is completed, we will retain any debts and liabilities of Astrotech Corporation not repaid or assumed by Buyer pursuant to the Asset Purchase Agreement, including expenses related to our remaining Spacetech Business. If the Asset Sale is completed, Astrotech will receive the consideration pursuant to the Asset Purchase Agreement.
1stDetect stays as does Astrogenetix.
http://blogs.barrons.com/techtraderdaily/2014/06/16/intel-rockchip-partnership-broadwell-to-boost-mobile-fortunes-says-wells/
Wells Fargo’s David Wong, who has an Outperform rating on shares of Intel (INTC), thinks the company may benefit from its recently announced partnership with China’s Rockchip to boost the company’s share in tablet chips, where Intel has trailed other vendors at fifth place in terms of units sold.
“We think that Intel’s growth in tablet processor unit shipments is likely to continue through 2014,” writes Wong.
Intel’s tablet share rose in 2013, he notes, and could benefit from Rockchip’s position in the Chinese market:
Intel’s share rose to 8%, from 5% for full year 2013. Rockchip’s share of 5% in the total global tablet market, with its business concentrated in Chinese tablets, implies a strong market position in China. This suggests to us that with the alliance announced between Rockchip and Intel, Rockchip could provide Intel substantial help in penetrating the tablet market in China, beginning in 2015 [...] We believe that Rockchip’s tablet processor sales are primarily into the Chinese tablet market. Rockchip’s shipment numbers suggest to us that Rockchip has a substantial presence and broad relationships with tablet makers in China. We believe that with its plans for financial support to makers of low-cost tablets, Intel will begin to penetrate the Chinese tablets market this year on its own efforts, and we think that Intel’s alliance with Rockchip could provide a significant boost to Intel’s momentum in China, beginning in 2015.
He concludes, “Intel’s alliance with Rockchip should help Intel grow its presence in China, beginning in 2015.”
The decline of Intel shorts ...
source: http://seekingalpha.com/article/2269593-intel-can-you-now-spare-a-penny
A technical gap has been left down to 28.42 from 29.56 on this year's trading. I find it hard to believe it will not be filled first before upward progress is resumed. Whatever happens resistance up to 30 has been weakened and will be easier to reach again on normal volume. Highest support is at 28.03 ± 0.28.
http://www.nasdaq.com/symbol/intc/stock-consultant
Intel price target raised to $40 from $35 at Jefferies
http://www.theflyonthewall.com/permalinks/entry.php/INTCid2024765/INTC-Intel-price-target-raised-to--from--at-Jefferies
Drexel Hamilton upgraded Intel to Buy and raised its price target to $35 from $28 based on improving PC sales momentum.
http://finance.yahoo.com/news/intel-upgraded-buy-hold-drexel-120838132.html
If you are so confident of your channel trading theory are you buying puts now ?
p.s. I also do not need to apologize for anything as you missed my original point there with your strawman diversion from one of the links I posted at the time, chipguy made money on this stock using buy and hold when you said he had not. You are the one who needs to do the apologizing for making erroneous statements as per usual accusing everyone of being bad investors and you being the perfect one when you clearly are not when I/we told you to buy around 19/20 about a year ago when you was twiddling your thumbs prevaricating expecting an even lower drop which never came.
Indeed it does but it only has to share it amongst 2 threads not 4 and Intel's L3 caches are FAST. If Vulcan's L3 is not twice as slow they would have done well.
I meant in server throughput if they tack a big enough L3 on to it. I don't expect Vulcan to be that competitive in single-thread against Xeon but it won't be so outclassed as all the others. I don't believe Cavium's 3-way 2W core will be competitive in any fashion unless you want 48 cores on your chip for some reason.
Andrew Feldman said some very strange optimistic things about AMD's server prospects which we noted at the time, it was more comical Marty Feldman than anything else. I suppose they want someone serious heading up that division now.
It will have 4 threads though which will bring up its throughput performance like their MIPS XLPII which can beat a network Xeon in some network benchmarks (and lose in others). 256KB L2 per core looks a weak point though.
There is only one ARM server chip that remotely looks competitive and that's Broadcom's Vulcan but which is relying on 16FF to turn up so that is a part that is years away. Cavium's Thunder is basically a big collection of A57 level cores and won't really cut the mustard if you run the performance/power numbers.
I am pretty sure he has learned to buy low and hold/sell until higher. He timed the bottom exactly in 2009 after a few attempts. Also your sell in the high 20s for INTC theory only worked by accident due to circumstances and TA patterns that will probably never be repeated. There is every chance this stock will be in the 30s soon and stay there.
but surely smartphones are more important
Intel was saving that for after TA trends had already pushed INTC over 28
http://finance.yahoo.com/news/intel-raises-second-quarter-full-200500307.html
As a result of stronger than expected demand for business PCs, Intel Corporation now expects second-quarter revenue to be $13.7 billion, plus or minus $300 million, as compared to the previous range of $13.0 billion, plus or minus $500 million. The company is forecasting the mid-point of the gross margin range to increase by 1 point to 64 percent, plus or minus a couple of percentage points, driven mostly by higher PC unit volume. R&D plus MG&A spending is expected to be approximately $4.9 billion, $100 million higher than the prior expectation of approximately $4.8 billion, driven largely by revenue- and profit-dependent items. The tax rate for the second quarter is expected to be 28 percent as compared to the prior expectation of 27 percent due to higher profits in higher tax jurisdictions. The expectation for second-quarter depreciation remains unchanged.
Intel now expects some revenue growth for the year as compared to the previous outlook of approximately flat. The change in outlook is driven mostly by strong demand for business PCs. The company will provide additional commentary on all business segments when it reports second-quarter earnings on July 15. The full-year gross margin percentage is now expected to be in the upper half of the previous range of 61 percent, plus or minus a few percentage points, driven mostly by expected improvements in unit cost and volume. A new full-year gross margin range will be provided on July 15. Full-year R&D plus MG&A spending is expected to be $19.2 billion, plus or minus $200 million, higher than the prior expectation of $18.9 billion, plus or minus $200 million, driven mostly by revenue- and profit-dependent items. The tax rate for each of the remaining quarters of 2014 is expected to be 28 percent, as compared to the prior expectation of 27 percent due to higher profits in higher tax jurisdictions. The expectations for full-year depreciation and capital spending are unchanged. No other guidance from the April 15 earnings release remains in effect.
Business Outlook
Intel’s second-quarter Business Outlook was originally published in the company’s first-quarter 2014 earnings release, available at intc.com. The company is scheduled to report its second-quarter financial results on July 15.
Intel’s updated Business Outlook does not include the potential impact of any business combinations, asset acquisitions, divestitures, strategic investments and other significant transactions that may be completed after June 12. Intel’s updated Business Outlook is posted on intc.com and may be reiterated in public or private meetings with investors and others. The updated Business Outlook will be effective through the close of business on June 17, unless earlier updated. Intel’s Quiet Period will start from the close of business on June 17 until publication of the company’s second-quarter earnings release, scheduled for July 15. During the Quiet Period, all of the Business Outlook and other forward-looking statements disclosed in the company’s news releases and filings with the SEC should be considered as historical, speaking as of prior to the Quiet Period only and not subject to an update by the company.
This is only a rumor but if true, I wonder how Samsung could have an issue integrating a ~2W SoC.
That is the power when one core runs flat out so what happens when 4 cores run flat out ? Avoton's max TDP tells you what happens. 4 mobile ARM cores running flat out do over 10W too so I don't know why anyone is surprised when they use quad-cores in phones they can't all run flat out at the same time for any length of time. So the max tdp is not the issue, is the way the turbo is being delivered perhaps ? I don't know, we are going on one rumor's site interpretation of events that have not even been confirmed. No need to get concerned when nothing has been confirmed about any part of the rumor or its interpretation.
You missed my point, dual-core is only 'low-end' in the OEMs imagination not in real usage. You are just helping to perpetrate this charade with your commentary.
Another point, if Phone OEMS actually bothered to use sane dual-cores then none of these issues would turn up. They all made their quad-core beds now they can lie in them.
If both Merrifield and Moorefield are finding themselves in OEM designs when becoming physically available then neither is really DOA. Give it time and I am sure that Merrifield will find itself in phones too. It is obvious Intel intends to have fun with the ARMy at 22nm and play match that price. 14nm will not be along much later to pick up the profit while the ARMy agonizes when 20nm is cheap enough to use. You missed the big picture at the time, this is a multi-generational assault of one ecosystem against another and individual designs need to be looked at in that respect rather than single-point game changers as you are now shifting your hopes in that respect to Broxton. Don't repeat the same mistake and broaden your viewpoint and look at it more as Intel the python slowly suffocating the ARMy year after year with whatever weapons it has at the time.
Anyways when can we expect an apology for all that DOA garbage we had to endure ?
Which they apparently don't want to get into a price war with Intel with.
and that's what they claimed when showing Bay Trail running benchmarks at 2.5W.
They are selling Avotons at an average 2.5W power per core max TDP
http://ark.intel.com/products/77987
That is not at a loss if you work out the die cost and the article does not claim that either. It's close to cost and if it's the difference between making a volume socket or not then it is obvious the path Intel should choose. Intel needs to get off 0.2% marketshare in this fastest growing computing segment and if the combined app/modem profit is only say $2 that soon adds up if you are eventually supplying hundreds of millions of chips in a few years time. Intel has set a new performance/price floor with Silvermont that the ARMy cannot match and the only vertical OEM who could, Samsung, does not want to bother letting its foundry division sink or swim by itself.
The bigger picture though is where in the ARM fabless world is anyone offering a $7 quad-core SoC with better than iPhone5s gpu ? Intel has come along with its internal fab disruptor cannon and is going to mow down the ARM fabless foundry model just like I said it would.
p.s. if there any heat/power problems over 2 GHz 14nm will cure that.