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tecchannel AMD Quartet update
http://www.tecchannel.de/hardware/1261/index.html
Some good anecdotal retail news. Ka-ching!! $$
Paul
http://www.theinquirer.net/?article=13249
"The true test that remains, however, is a test comparing AMD’s Opteron to Intel’s Itanium 2. Intel was not very receptive to the idea of doing a head-to-head; not out of a fear of losing, but out of a desire not to lend AMD any credibility by showing that the Opteron is indeed a competitor to the Itanium 2. While we do believe that the Itanium 2 in its 128-way configurations is definitely out of the Opteron’s league, in the 2-way and 4-way configurations that we are interested in comparing, the two are absolutely competitors.
Whether Intel is looking to supply us with an Itanium 2 system or not, we will make that comparison. It seems that if these web server results are any early indication, AMD has more than enough credibility with the Opteron to at least step up to bat with the Itanium 2 pitching."
Should be fascinating!
Paul
ixse- re I don't see this message as a new delay (it's just an explanation of the delay till Q2 04 that was announced in Q3 03).
Agreed. I didn't pay enough attention to the headline, either; I posted only as a possible explanation of the known delay.
Paul
drjohn - likely a lot more than the # of Itaniums. :)
Paul
wbmw, in such a forum as this, it might be wiser to use "one", "oneself", etc., to avoid miscommunications.
Paul
Keith, the last paragraph has the teaser in it:
The choice today is clear. In 2-way configurations, the Opteron is a much more powerful and capable web server than Intel’s Xeon. But the performance tests are nowhere near over. We’ve been playing around with AMD’s 4-way Opteron 848 machines for months now and are not far away from bringing you the first head-to-head comparison between the Opteron 848 and a 4-way Intel Xeon MP system. AMD has been praising their Opteron architecture for MP scalability, and soon, we’ll be putting their claims to the test.
Paul
Possible reason for Windows64 delay? At least it may show there is increased cooperation between MS & AMD. Security is one of the main reasons for the emphasis on XP SP2, nice to have the MS press concurrent with the AMD K8 security press.
Paul
http://www.theinquirer.net/?article=13231
Our information is that a significant amount of Microsoft development resources has been switched to focusing on rolling out Windows XP Service Pack 2, and this seems to be shaping up to be one of the most significant Service Packs that Microsoft has released.
http://msdn.microsoft.com/library/default.asp?url=/library/en-us/dnwxp/html/securityinxpsp2.asp
Memory protection. Some attacks by malicious software leverage software vulnerabilities that allow too much data to be copied into areas of the computer's memory. These vulnerabilities are typically referred to as buffer overruns. Although no single technique can completely eliminate this type of vulnerability, Microsoft is employing a number of security technologies to mitigate these attacks from different angles. First, core Windows components are being recompiled with the most recent version of our compiler technology to help mitigate against buffer overruns. Additionally, Microsoft is working with microprocessor companies to help Windows support hardware-enforced "no execute" (or NX) on microprocessors that contain the feature. NX uses the CPU itself to enforce the separation of application code and data, preventing an application or Windows component from executing program code that an attacking worm or virus inserted into a portion of memory marked for data only.
Keith - you're right, sometimes it's darn hard not to respond to off topic stuff and rabbit trails! Yeesh! I'm getting better at it, though. ;)
Paul
FWIW - While I agree that the driver people at Intel are one of the best, I don't agree that they could do it in secret. I also don't think that they could keep other peoples mouths shut. Something would have slipped out in visual studio, GCC, a linux header or whatnot.
That said, several people told me flat out that they are working on Intel 64-bit x86, and it uses AMD64 as an instruction set. :)
-Charlie
http://www.aceshardware.com/forum?read=105059179
Paul
Keith - May I have one, please? :)
Paul
EP - don't be silly, there's no double standard. Many among the "Intel crew" here have posted similarly nebulous personal knowledge statements about Intel's plans and no one deleted their posts or treated them any differently than Keith expects his post to be treated - as baseless rumor.
Paul
chipguy, that "k" explanation was exactly what I was looking for. I've had a nebulous idea of what it was, but wanted to understand specifically what it is in relation to other electrical properties and how it affects design.
Thanks much,
Paul
EP - is "k" an actual electrical property, if so, how is it defined/measured?
Paul
CJ, could you give a brief explanation of "k" and what the advantages/weaknesses(real or theoretical) are of low k and high k?
Thanks,
Paul
drjohn, by "struggle at 90nm" I am purely referring to power issues, not production.
Paul
Keith, wbmw - Pete on SI brought up a point on SI re: AMD power that hadn't occurred to me yet. Could it be the 105W envelope is intended to include the upcoming dual core chips?
Paul
http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19601502
Keith, wbmw, chipguy - that last couple of sentences seems to say something very different than the xbitlabs article re: AMD power. Wonder what the real deal is.
chipguy, since SOI is supposed to reduce the leakage problems "downward", what are some of the possible ways to deal with other leakage issues, which someone here referred to as "horizontal", if I recall?
Paul
wbmw, well that's not particularly encouraging. I had hoped for more savings from SOI than what's mentioned in that article. But, at least it's not any worse than Intel's struggle at 90nm.
Paul
EP - re: Keith, I am reporting this as a personal attack.
Grow up.
What on earth are you talking about, Elmer? Attack?! Not that I see. At all. Even remotely.
Paul
Doug, as long as there were no overlap between the 754 and 939 PRs, it wouldn't matter. The 754 is going to wind up "Celeron/Duron"-ized, it seems, so it could work that way, but this is just speculation, of course.
Paul
Keith, I think you're underestimating it. K7 gets 1-2% increase from single to dual channel with nForce2. I expect more with A64 because the PSB won't be saturated nearly as quickly as EV6 is. We'll see.
Paul
kpf - Perhaps I ought to have said "and 939 may be a nice improvement over even FX Socket940."
But the main point is that with dual channel, 939 should be an even more substantial bump over 754.
Paul
More on IEDM from RWT. Thanks to ixse from SI. Low-k is SiCOH.
http://www.realworldtech.com/page.cfm?ArticleID=RWT121303010053&p=2
Paul
kpf, the difference here is that K7 had an "FSB"(yes I know it's not really an FSB) that couldn't really make use of the increased bandwidth of a dual channel system, whereas K8 has a "PSB" operating at full processor speed which is more than capable of making use of it, just as P4 can better make use of dual channel than K7.
Then, add in the unregistered factor, and 939 may be a nice improvement over FX Socket940. This could be used to deal with any substantial improvement Prescott brings.
Paul
Keith, Groo_/Charlie D. already retracted that on the Inq yesterday(Saturday?). Supposedly, according to this site:
http://www.lowyat.net/guides/athlonxp
the data segment where the CAAOC is includes the stepping code, but as I noted in my post this site was covering K7, so it's possible it's not valid. And if some 3000+s are CAAMC, then all bets are off as to what the heck it is. Maybe a mix? I do notice they have the stepping code blocked out, so who knows if this is actually a released processor and not a sample of some sort?
Paul
Doug, what I mean is that Socket939, with dual channel, would be a logical break point for a change in the rating system. Perhaps 754 will be relegated to Celeron status then.
Paul
Looks like Prescott may be bandaided, not fixed.
"Thermal is an engineering challenge," Fravel said in the addressing the reports. "We are pretty confident that we have a solution to address the thermal issues."
If they're shipping it this month, it couldn't be a silicon answer, they'd be sure of the solution by now. Maybe no "OEM" chips, only retail w/ special HS, or something similar?
http://www.siliconstrategies.com/article/showArticle.jhtml?articleId=16700370&_requestid=66090
Paul
EP - re:but in about 6 weeks there will be a Prescott 3.0GHz version that A64-3000 will not compete well with
You mean right about the time Socket939 comes out?
Paul.
Thanks, Klaus! eom
yourbankruptcy, could you re-post the yahoo intel-amd links site URL?
Thanks,
Paul
subzero, don't you ever get tired of ranting to yourself? 'Bye! Click.
Paul
Semi - LOL! But did they really need to use those black helicopters to pick them up?!
Paul ;)
Doug, the CAAOC(it's an O, not a zero, BTW) and CAAMC are stepping codes, so the 3000+ is a different stepping. Now I can't state this with data to back it up, because I can't remember where I found it way back, but regarding the UPMW and SPMW, I believe the first digit had something to do with where in the wafer the die was located.
Paul
Edit: This link is from before A64 days, but it'll give you and idea of what the data means.
http://www.lowyat.net/guides/athlonxp
Doug, that appearance timeframe is possible, but it's really up to the MB makers to get their act together now. Let's hope that they aren't behind.
Paul
chipguy, just because it's rated at 3000+ doesn't mean it's not capable of much more. There is a need in their market plan for a lower level chip, this is a way to fulfill it. Don't worry, you'll see faster chips soon.
The reason I consider it good news is that they would not likely be monkeying with a different die if they didn't feel they had the process down pretty well. Either that or they made some fixes incorporated into this die that they like. Either way it's good news.
Paul
Doug, re: Newcastle - that is good news.
I had an older version of that chart that I linked, which didn't yet have the 4=512K entry. I've updated that now. I also had it posted on the Yahoo intel-amd links site that yourbankruptcy(?) set up, but I can't find the darn site! Anyone have the URL? I thought I'd bookmarked it, but I appear to have deleted it by mistake.
Paul
Not sure what Charlie meant by his headline here:
Athlon 64 3000+ comes into focus
Mists clear, fog rises, murk disperses
WE RAN a story yesterday about the Athlon64 3000+ that will debut next week.
See here. (http://www.theinquirer.net/?article=13153)
Since then, the story has come a little more into focus, or at least the picture has. Here we present you with an Athlon64 3000+ picture with text that is not horribly blurred out, and half the chip is not missing due to over eager use of the flash.
Benchmarks in the near future. µ
In looking at the part number, it's apparent that this chip is not a 1M cache chip. I can't say exactly what it is, but if I had to guess from the chart, I'd say 512K. So, I'm not sure how that clears up the fog, unless he's saying that they all will be 512K, which goes against a lot of the other evidence.
http://www.angelfire.com/nv2/pflynn/opn_amdk8.html
Paul
PS. Of course, he might just be referring to the lousy first picture he had in an earlier article.
chr p, Mysef, ECS can be very cost effective, but their quality control has left a lot to be desired in the past. The 735 developed quite a following, but some of them also had a lot of problems. The ones that didn't rave about them for performance/price, though. If you get one, make sure to run it through the wringer hard right away. Generally, their problems, if they have them tend to show up pretty quickly.
Paul
wbmw - re: DTR comparisons. Links please(ZDNet didn't make it very easy to find that particular roundup). If it is set up the way it looks, it's not exactly a fair comparison AMD with IGP video against Intel with discrete video cards. And ATI's IGP320 memory performance stinks, fortunately with A64, there'll be more options for chipsets.
Paul