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agree and we won't know all of that for a while.
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Since 3dxpt isn't a RAS/CAS/refresh interface I would think it would go well with HMC serial interfaces.
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Just listened to the webcast. My first thoughts: I suspect Dell, HP, others will be scratching their heads on how to use this and it will take some prototypes from Intel to point the way. I doubt this info has been shared widely since there haven't been any rumors that I've seen.
I doubt this will get "wasted" on NVMe SSDs. I wouldn't be surprised to see some use in upcoming Xeon systems for HPC/big data again pioneered in heavy collaboration with Intel. Perhaps in some of the Xeon PHI systems?
I expect other memory suppliers to generate a lot of PowerPoints and FUD in the coming weeks and months. No idea if they have anything like a wafer to show.
It will probably require some memory management work on the part of MSFT, Apple and the Linux community (read Intel) to make this really sing.
This could be big in terms of computing impact and $$ for Intel and Micron but not until it gets adopted in volume which is a chicken and egg thing. It will be interesting to see what happens but I don't expect a big impact before 2018.
Perhaps we'll see some demos at IDF.
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IBM's cloud? Does IBM host their "cloud" on mainframes? Or Power-something or X86?
It seems to be the only bright point on their poor quarter just announced.
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I wonder how ORCL Sparc sales are doing. Do they break that out?
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AMD OPEX reduction planning underway. Expect restructuring charges. Wafer agreement in renegotiation. Possible further tapping of their ABL credit line.
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That would be up to Adobe of course. They do provide a list of what is currently GPU accelerated and I'll review it.
The GPU on Skylake probably is significantly better in some respects than the one on Ivybridge but no idea if it would affect GPU compute rather than just improved graphics performance.
Thanks for the reminder.
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I doubt that a consumer box will have more than 4 cores/8 threads soon. The jump from Ivy Bridge to Skylake will give us some improvement but the NVMe SSD for data will likely buy us more.
If a solution with more cores became available we'd give it a look. But not willing to do it "at any price."
BTW, I've built our last few PCs since I was unable to buy the configuration from either HP or Dell that I wanted. I would have preferred to buy as I have better things to do with my time.
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While importing a bunch of raw files from a card from a 36Mpix camera yesterday we noted that Lightroom had all 8 Ivy Bridge cores heavily utilized with overall CPU utilization ranging from 50-75%.
We could definitely use a faster processor and a move to SSD, preferably NVMe for data storage.
We'll update to Skylake early next year with 4Tb NVMe. Already have boot drive as SSD.
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I can't believe intel would be happy with this given all the tech and biz relations with MU.
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Super Computer conference in Germany next week. Perhaps Intel will disclose additional Xeon Phi details.
http://www.hpcwire.com/off-the-wire/hpc-enthusiasts-to-gather-in-frankfurt-for-isc-high-performance-conference/?utm_source=feedly&utm_medium=rss&utm_campaign=hpc-enthusiasts-to-gather-in-frankfurt-for-isc-high-performance-conference
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Lots of reorg at INTC announced today:
http://www.intc.com/secfiling.cfm?filingid=50863-15-44&CIK=50863
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i'm sure they'll get their $4B back they spent on it...
/sarc
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It's not strange at all. I need a very portable unit for sniffing RFI around the neighborhood. A visible as well as audible indication of the nature of the RFI is a big assist in making easier to locate.
If you haven't had to do it you wouldn't understand and commercial alternatives are very expensive for a hobbyist.
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Thanks for the replies. My research has turned up a bunch of unpleasant things about Android that I need to work out. I may end up on Windows afterall.
Android is a fragmented mess. I saw an article mentioning that Google was belatedly trying to herd the cats. They certainly need to get it figured out.
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I need a quad core tablet with USB host ability to be part of a portable spectrum analyzer to chase down RFI sources.
There are free programs on Google play that fit the bill but a quad core is required. Rather than just buy a Samsung I thought I'd ask if anyone has an intel based recommendation.
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Interesting speculation about China Inc.
http://m.barrons.com/articles/BL-TB-47986
I wonder what the Intel reaction would be? I wonder how/if the Feds would react?
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From my experience when at Intel: the architects always maintain a list of best bang for the buck ideas. If 4-way SMT was at the top of the list it would be done.
BTW, doesn't Phi have 4-way SMT?
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Looks like the new, faster version of NVlink four times as fast is on a chip still under development. Perhaps I read the info wrong.
What could possibly go wrong given Nvidia's somewhat checkered history if new big die launches?
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Nvidia has some sort of unique bus defined for a tighter integration. I don't remember what it is called. I wonder if IBM will do one-off silicon just for this project to integrate that bus onto what ever PowerX version they're planning for this.
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The OpenPower activity is a last minute attempt to get volume scale but I doubt any of the participants will ever viable products. The US DOE contracts recently let for the four big HPC installs due to come alive in 2017/8 required different approaches to be selected.
One approach selected was Xeon Phi and the other was a heterogeneous approach of Power and NVidia.
Theoretically it's "OpenPower" but in fact the only company competent to do the work currently is IBM. No idea where they plan to build the custom silicon needed.
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Not exactly an impartial test. No mention of how benches are run, what compilers and switches used.
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Interesting article comparing Power8 and Haswell for HPC applications:
http://www.hpcwire.com/2015/06/02/cpu-benchmarking-haswell-versus-power8/?utm_source=feedly&utm_medium=rss&utm_campaign=cpu-benchmarking-haswell-versus-power8
TLDR: Haswell rulz!
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I think Larry Palley was involved as well.
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I remember trying to sell EPLDs...
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So far we know that Intel is ready to begin shipping 3D flash with Micron and we know they are doing stacked die for DRAM for HMC including a special version to be included on Phi, again with Micron.
I haven't heard anything about phase change memory in a long time. I wonder if they've given up on that?
We know both DRAM and disk storage have lagged the performance increases for processors for a long time. It seems logical that Intel would work to address these. Perhaps they're going to not just promote a standard but get aggressive about making some money on solving the problems as well.
A terabyte on a gumstick (M.2) and 8 to 16 gigs on package of "something" could make a big difference in performance and more importantly on Intel's share of wallet.
I'd expect to see this sort of thing start at the premium end and work its way down.
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At 4:25 in this presentation Katy grouses a bit about what she can't say about KNL.
There's also some as yet undisclosed features in the Knights Landing that will probably be unveiled at ISC15 in July. Perhaps they're related to this.
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a well reasoned case. not strident at all.
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if it is commonly used and put into open source i still would recommend talking to the developer team. they live this stuff and improving a commonly used function in open source is a big deal.
don't be shy.
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have you inquired about getting some help from intel? their developer relations folk are often very helpful.
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So I wonder what those nvidia and amd accelerators are used for?
They're horrid on branches.
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That's where Intel's fabric and ssd I/o acceleration will come into play. Did you see the chassis full of nvidia cards?
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Did you watch the video?
I'll stand by my competitive assertion. Some will adopt Phi others won't (initially). Some may never.
Time will tell but it will be hard to ignore advances made by those who do and are successful.
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Certainly they'll hold on to CPU share but the accelerators used today are captured by NVidia and AMD. Those $$ would move to Intel, thus lifting ASP.
Once it becomes apparent that Phi can solve problems quicker than traditional Xeon then the market will expand giving Intel it's traditional SOM but also a bigger market to serve.
Also the fabric work will make it possible to expand node count for something that would have been otherwise unaffordably complex.
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From what I can tell if they need to computing power to solve their problems they will figure out how to take advantage of Phi has to offer. At least they won't need to deal with a heterogeneous environment.
Scientists are competitive too. If some of their colleagues make advances using Phi they'll figure it out.
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BTW, the reason I keep posting about HPC is that it is an emerging market but with a big ASP attached. I realize that everyone seems to be focused on phones and I understand the need for that. But that market at least in the developed world is nearing saturation.
HPC via Xeon Phi has a high probability of some serious growth both in units and ASP for commercial big data, medical, industrial and scientific uses outside government DOE funded TOP500 one-offs.
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Another reason I think the Xeon Phi processor variants will start to "move the needle."
http://www.hpcwire.com/2015/05/18/25-of-life-scientists-will-require-hpc-in-2015/
The nearly homogeneous programming model combined with storage and fabric work Intel is doing will allow a broad application of what was Top500 class machines a few years previous.
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