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May be due to code density.
RISC is inherently lower density than
CISC
This is simply not true. Code compiled for high end RISC has
poor density because it is scheduled for high performance on
wide issue superscalars and has lots of NOPs to avoid split
issue and to align branch targets.
But code compiled for a scalar RISC like ARM is quite dense,
often better than x86. And when even that isn't good enough
there are special ISA extensions like ARM Thumb and MIPS16
that reduce code density to significantly better than x86.
and embedded designs tend to require
small, cheap chips which in turn is
incompatible with large cache or fast bus
technology.
Just a guess...
ARM has been surprised by how few customers use Thumb
in their applications even when it is present in a given uP
model at no extra cost. It seems the need for code density
just isn't what it used to be 10 or 20 years ago.
What does cost in the embedded market is Crusoe's need for
a secondary memory interface and a 16 MB DDR array for the
CMS to cache translated x86 code segments.
Keith, amazing! The guy was much hated, but he is the best!
The ironic thing is he used to be a chip designer at Intel
before deciding to go for the big bucks and limelight. I
guess he is good at knowing which questions matter and
which answers smell funny.
On the TMTA CC, Matt Perry said that embedded tend to apps run better on CISC designs (e.g. x86) than on the RISC designs. This is the first time I had heard that claim and I was wondering if anyone can provide any color. T.i.a.
For 32 bit processors that is clearly nonsense. The 32 bit
embedded world used to be dominated by CISCs like 68k and
NS32k. Now RISCs like ARM and MIPS far outsell CISC for 32
bit embedded control sockets.
In 1998 the 32+ bit embedded control market leaders were:
83m 68k / Coldfire
50m MIPS
48m ARM
26m SuperH
In 1999 the 32+ bit embedded control market leaders were:
151m ARM
94m 68k / Coldfire
57m MIPS
33m SuperH
RISC hasn't looked back since. ARM based CPUs are shipping
at well over 100m per *quarter* now so Matt Perry is clearly
blowing smoke. And x86 barely registers on the radar screen
in embedded control - in 5th place in 1999 with 28m units.
The 970 should beat the initial Deerfield somewhat in SPECint
and some commercial apps but that is all. In the FP intensive
applications Deerfield is intended for it should spank the
970 while consuming less power. The Opteron should beat a
970 server pretty much across the board but not as much as
a Deerfield for FP workloads.
As far as IBM server vs Apple G5, depends on the workload.
For server class workloads I'd be surprised if the IBM box
wasn't superior, perhaps significantly (Apple designed the
G5 chipset).
Sure bloody well looks optimized for McKinley.
Nice information, thank you. But I am sure you would be refering to direct costs. I am just musing now, but it would seem appropriate to amortize the cost of a 4 billion dollar fab with a useful life of say three years over the cost of producing say .5 million Itanium 2 chips a year which is what maybe $2,600 per chip?
So far IPF chips are made in fabs/processes fully paid for
by x86 products. McKinley was made in 180 nm fab while x86
moved to 130 nm. Madison is being ramped in 130 nm fab
while Intel readies 90 nm for Prescott.
If IPF ever reaches the volumes that can fill a fab on its
own then Intel can afford to run it in the very latest fab
and process and do full cost accounting against it.
Opteron takes 13,258 seconds with 64 bit client and 12,182
seconds with generic 32 bit x86 client to perform one Ars
Technica work unit. But if I look through the SETI scores
at Ars Technica I see that a 900 MHz, 1.5 MB McKinley did
a work unit in 16,860 seconds. Of course that was with the
crap code gcc generated. With HP-UX cc the same machine
did a work unit in 5820 seconds or more than twice as fast as
the Opteron 244. But with SETI dominated by FP intensive
FFT calculations this should come as no surprise. But what
was surprising was a 1.5 GHz Banias clocked in at a brisk
8340 seconds. Ouch!
For a change of pace, I would like to hear people's thoughts on Intel's current prediction of gross margins rising to 54%. If I'm not mistaken, the prediction was for GMs to average 54% for the year, implying numbers greater than this for Q3 and Q4 (given that the GM was around 50% for Q1 and Q2).
I presume that Pentium M and Pentium 4 prices will decline throughout the remainder of the year until Dothan and Prescott arrive. For Q3, where could the uptick in GMs originate?
Intel release a new chip at the end of June with list price from
$1.3k to $4.2k that probably costs $100 to $150 to manufacture.
http://www.crn.com/Sections/hardware/hardware.asp?ArticleID=43146
"Intel executives say their company's Itanium 2 platform has
reached the point at which the market has begun spending as
much,or more,on Intel 64-bit processors as it does on competing
RISC chips."
I´m still unsure what to think of the performance of the Power PC970. How does it perform, from what you´ve seen?
IBM estimated a 1.8 GHz 970 would give SPECint2k 937, and
SPECfp2k 1051. It loses a lot of performance compared to its
big brother POWER4+ due to the much inferior cache hierarchy.
The 970 has a on-chip 512 KB L2 cache vs 1.5 MB on-chip L2
cache and 32+ MB L3 external cache in the POWER4+. It is
basically a desktop chip pressed into a server role.
2 and 4-way 64 bit servers start to heat up.
Now we will have PPC970 ones from IBM.
Yes the party is really starting to rock. The big loser of
course is Sun. Their SPARC based products have never looked
so old and tired.
Is Intel's current price premium really worth it, considering that buying Intel is betting on the failure of the X86 platform?
Yet another whopping lie from Dan3. Are you even conscious of
your lies when you make them or is it pathological?
Intel continues to invest heavily in multiple new generations
of x86 cores. Just as your close association with AMD renders
you unfamilar with earnings, it also seems to blind you to the
reality that big, successful companies have multiple product
lines.
hought you might be interested in TMTA’s claim of a 50-80% performance improvement for the TM8000 vs TM5800 on a constant-clock basis.
TMTA has made unsubstantiated claims in the past so this
claim carries very little weight until it can be verified by
competent 3rd part reviewers. BTW, do you think TMTA will
repeatedly deny an evaluation system to MDR* again this
time around?
*Micro Design Resources, the publisher of Microprocessor
Report.
Now, you're saying it's the first 64-bit desktop machine
This is only even an issue among computing newbies. Anyone
following computers since the mid 90s would remember Win NT
desktop PCs based on 64 bit MIPS and Alpha processors. It is
true Win NT wasn't a 64 bit OS but it seems that the G5 and
Opteron won't have one either, at least for a little while.
Elmer, do you think AMD had any choice? What did they make before they acquired the x86 technology? I recall something like what Motorola and Texas Instruments are doing? Plus flash? By now, they would be just another small flash provider.
JSIII's oversized ego kept AMD on the x86 track at all costs. If
a more pragmatic CEO had been in the corner office history could
have been quite different. AMD could have held the 29k to 3rd or
4th highest volume 32 bit embedded uP family - easily 20m units
per year or more at nearly as high ASPs as its x86 chips get
today but without the need for bleeding edge processes. AMD was
also once strong in networking and bipolar chips. It could be
doing well today in DSL and wireless if Jerry hadn't gotten AMD
out of the meat and potatos markets he didn't find sexy.
So anytime you have a choice between intel and somthing else intel is the clear choice? Just because?
Of course not. Each and every case has to be evaluated on
its own merit. That is why I have bought both AMD and Intel
based PCs in the past and will look carefully at all possible
options when I make my next purchase.
The fixing of the prefetch bug with the Gallatin B0 core means better performance for all Xeon chips. The prefetch bug first emerged in the Foster Xeon MPs two years ago, and that led to the ludicrous situation then where dual Pentium III-512Ks performed better than Intel's premier server chip.
http://www.theinquirer.net/?article=10551
Will Intel be replacing the chips with the bug?
Probably not. Sun and IBM never replace their server chips
with prefetch bugs in their much more expensive gear and
that might have set a precedent for customer expectations.
Very simple. In the eyes of its sycophantic supporters AMD
can do no wrong. AMD's failures are always caused by an
external force, which 99% of the time are claimed to be
Intel secret agent men. AMD processors not leading in
performance - secret agents infilitrating web sites. OEM's
not buying AMD processors - secret agents and horse heads
in bed. No mobo's at launch - phone calls from secret agent
men. Face it, some AMD fans need psychiatric help for their
clinical paranoia more than investment advice.
All this is simple denial. Denial of the fact that Intel
products represent better value propositions for hardware
OEMs. The Newisys exec who said that demand for Opteron
was low didn't have a secret agent man's gun in his back,
he was simply being truthful.
Looks like Intel kept them silent and even now, when the information is public, Tyan is not making any noise out of it. I think at this moment Opteron sales are so light that no special advertisement can bring enough sales to warrant all sort of damage that Intel will make in revenge. Monopoly is the thing that can help to preserve itself not by technical merits, but by simple force.
Always falls back to the bogeyman excuse. Did you ever
think that focussing on Intel based products is simply
the better business decision?
As for your 40 bit jibe, I doubt AMD customers have serious trouble with the 1 Terabyte physical RAM limit. It's the 33rd bit that's the most important innovation. After that the 34th. By this measure the Itanium isn't a true 64 bit CPU either. Who cares?
Actually I2 is the only 64 bit processor I know of by this
criterion. It translates all 64 bits of a logical address.
It is true that it only brings out 50 physical address bits
but to fully populate that address space would take about
33 million 256 Mb DRAMs.
The Opteron supports a 48 bit logical address and a 40 bit
physical address space. So an Opteron system would be fully
populated by only 32,768 DRAMs, although DDR I/F loading
limits cut in before this. Unless you are talking Red Storm.
because AMD can get 88% of the floating point performance
More like 53% of the FP performance.
Itanium ii is faster in fp than Opie.
I'm guessing, when the flag ship class behemoth passes a sloop as it leaves the harbor, its time to declare victory, spike the ball and butt slaps all around.
I was under the impression that Opteron was AMD's flagship
processor. Is the royal AMD navy so poor that a sloop flies
its flag? Sound's like all hands should abandon ship before
rear admiral Ruiz runs it onto a reef chasing the Itanic. :-P
Personal attack, I've complained, lets see if your post disappears.
Not nearly as damaging as your own "I am ignorant
and proud of it too" comments about IPF processors.
I merely applied the "walks like duck, quacks like a
duck..." rule of thumb.
Their sole purpose is to have AMD destroy Intel, even if it means that AMD wraps itself in explosives and sets itself off in the Intel "marketplace".
Interesting analogy but I am not sure if Intel employees
in Israel would appreciate it.
No matter how you cut it, the native hardware support for x86 on the itanium is pretty poor.
Intel doesn't even mention it anymore, especially mow that they are trying x86 software emulation.
I agree, it will be great for IPF designers when the x86 boat
anchor can be dropped from silicon (~24 mm2 in McKinley) in
favour of software based compatibility. The x86 block is stuck
in a critical part of the pipeline and removing it will have
benefits far beyond CPU die area savings.
The Alpha boys had the right idea from the start with FX!32.
The FX!32 emulator/recompiler consistently obtained ~70% of
Alpha's native 64 bit performance running x86 integer code
and ~50% of native performance with x86 FP code under WinNT.
They just didn't have the influence or resources to make it
stick. BTW, at one point Alpha/FX!32 was the fastest way to
run most CPU intensive x86 binaries. It will be devestating
for AMD64 if Intel can even just approach this feat with
software compatibility for IPF.
I guess designing Intel-based servers may be against their religion, but making money may mollify their souls.
LOL, some companies are funny that way, you know, wanting
to make money.
It seems to be a foreign concept for some on this board.
Then again if you only follow AMD making money is an idea
long lost in the misty depths of history.
"The x86 compatibility logic in I2 was greatly enhanced "
Great! Any links to the performance figures? I haven't seen anything about the x86 compatability mode for McKinley, much less Madison...
Naffziger's comments were in the Q&A so its not in the
digest or slide supplement. Try Dejanews on comp.arch.
The I2 x86 performance thread was in the early fall IIRC.
Sorry I can't be more helpful.
BTW, the Madison's x86 performance should closely track
the relative increase in native performance vs McKinley.
<McKinley was a completely rearchitected core.>
If true, that implies that compiler optimzations for native code designed for Itanium 1 or Itanium 2 won't work on Itanium M, unless they are recompiled. For example, if Itanium M can do 4 floating point ops each clock and Itanium 2 can do 2, the packing of floating point ops has to be completely changed.
And, I think you are exaggerating. Memory interface was certainly improved, but I suspect that Itanium M has exactrly the same number of functional units as Itanium 1.
You should change your sig to Putz. Detailed info on the
significant differences between the McKinley and Madison
core is available on the Intel and HP web sites and in
various technical publications.
Also if you compare the effect of running apps recompiled
for McKinley vs running Merced binaries on McKinley you
will see smaller benefit from recompiling than the Alpha
EV5 to EV6 transition and *much* smaller than the PIII to
P4 transition.
I am talking improvement per clock. Do you have any evidence of this? I didn't see any claims of improved x86 performance.
Sam Naffziger, the chief architect of McKinley said so at
ISSCC 2002. The x86 box was completely redesigned and it is
both simpler, more compact, and efficient. Performance was
described as 1/3 to 1/4 of native 64 bit performance although
he didn't say on what workloads. There was a post on comp.arch
by someone who ran an x86 benchmark on a I2/900 and his data
was on the low end of this range.
Do you think Intel wants to keep it a secret?
No, but x86 doesn't market IPF processors for running x86
software, they have cheaper, special purpose chips for that.
Petz - Perhaps it hasn't occured to you that in the last 3 months, AMD achieved the goal of having the fastest x86 server processor for 2 and 4-way systems.
As usual you are wrong. AMD promised the highest performance in the universe and they came up short. The only benchmark of significance they currently hold is in SPECfp_rate for x86 processors. They lose on everything else.
LOL, and it still doesn't make it fastest either on x86
FP either. SPECrate measures throughput, not speed. In
SPECfp_base2k the P4 is up to 12% faster than Opteron.
You're not dumb. Why make a dumb post? You know perfectly well that all those OSs run natively on Itanium.
Technically they do, but you are not dumb to know that practically, by 2003 standards, Itanium does not run any of these OSs.
FYI, in Seti@home processor efficiency chart (# of cycles / FLOP), while Itanium is #1 in IA64 mode, it is second to last in x86 mode, beaten by such powerhouses as AMD 586, Via C3, Intel 486.
It's ahead of the 386 though. <g>
Switching from dumb mode to ignorant mode is hardly an
improvement. The only x86 mode SETI entry for an IPF
processor is for a 2 MB Merced. The x86 compatibility
logic in I2 was greatly enhanced and it sits on top of
a vastly improved cache hierarchy. I would be surprised
if the SETI "CpF" figure for I2 in x86 mode wasn't at
least 4x better than the one posted for Merced.
I tell you what, the next time we need a stand-in for
Opteron FP performance why don't you dig up a K6 score.
The SARS outbreak caused a big reduction in phone sales in Asia, and phone sales to Intel and AMD = flash sales. For Intel, this made for a terrible quarter for flash, but had little effect on the overall company (flash is a very small percentage of sales at Intel).
Asia is also the world's leader in uptake of 3rd generation
cell phones which are a major user of Intel's StrongARM/Xscale
processors. If SARS was killing Asian phone sales it would have
had a double whammy effect on Intel.
desktops are hurting - probably from transitional blues
as the market awaits 64-bit processors. If this is true then
we have one more hard quarter in desktops.
One more hard quarter in desktops?
Are you expecting a step function product transition from
Athlon to A64?
I see two scenarios for AMD in the desktop and neither is
very good. The first is that A64 exceeds expectations. In
that case Athlon sales drop through the floor and A64 can't
possibly sell in sufficient numebrs to make up for them. The
second is that A64 disappoints. In that case gamers and
other performance junkies sitting on the fence will give up
on AMD and buy a high end P4C instead.
Re: More shipped than competitor's whole 2002 64-bit.
As if that's an accomplishment.
So does that mean ~3000 Opteron systems sold? After all, they failed to use the gratuitous "Nx competitor's volumes", where, N is a positive integer, so I'll have to assume it was less than 2x, but greater than 1x.
According to AMDzone Ruiz's phrasing was more Opterons sold
to date than all "Itaniums in 2002". That could be taken as
factually correct if more Opterons sold than 1) Itanium 2s
plus Itaniums (since Itanium can refer to the IA64 family),
or 2) Itaniums (Itanium is the official name of the Merced).
Obviously the latter is a very low bar indeed.
I guess the one good thing, though, about trading AMD is that the stock always seems to give you just one more chance to get in cheap.
What did Paul Engel used to call it - the AMD round trip or
the AMD sinusoid?
ntel reported record revenue in the Asia-Pacific region. AMD warned of a big revenue loss and blamed it on the SARS effect in Asia.
I noticed that too, and wondered when it would come up on this board. I think AMD's credibility is strained to the breaking point.
Come on, did you really need to have it laid out so plainly
for you? It was obvious AMD was grasping at straws when they
brought up SARS in their warning. I think next quarter AMD
will blame fears of genetically modified silicon in their uPs
for lower sales in Europe. :-P
When does AMD announce earnings?
http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~72162,00.html
July 16th
Anyone care to give odds for a 4x INTC/AMD share price
"crossover" tomorrow?
But don't try to pretend your "earnings" are the result of a legitimate free market company's operations.
Sorry, it is the illusion I harbor from being able to walk into
a computer store and freely choose to buy systems and components
for either AMD or Intel based computers. And yes I do own both.
Red Storm uses Opteron 148
(Edit: Of course I'm too polite to point out that this means I was right in dismissing as rubbish all talk of using 2xx or 8xx Opterons to make cache-coherent multi-CPU nodes.)
Likewise.
These days they are content to just put the memory controller on the wrong chip.
The customer is always right and to date they are voting with
their wallet for Intel's choice of system partitioning.
Why don't you ignore him?
Gratuitous schadenfreude, pure and simple.