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Don't you mean binning not yielding?
AC yield at x GHz == binsplit for x GHz and above
If they just got a new stepping, which is giving, say, 5% of all chips as 2 Ghz, then they can introduce the new speed grade right away, without allocating chips for many weeks.
FYI, a little birdie in IAG told me last year that Intel won't
introduce a new speed grade unless it is yielding at least 15%.
If the old stepping is giving, say, 0.5% of all chips binding at 2 Ghz, then collecting them for several weeks will give few thousand items, enough for introduction.
ROFL.
You think AMD is making a few hundred thousand Opterons a
week?
The original source was on the Inquirer. However, apparently the 246 offered at Akiba have a product code that indicates 1.45 volts and a higher case temp.
If the x46 version of Opteron operates at a reduced core
voltage I would have expected an update to the data sheet
beyond rev 3.00 when it was released. The existing data
sheet states the core supply is 1.55 V.
Given that the 1.4-1.8GHz have a max. core voltage of 1.55 volts and the 2.0GHz is at 1.45 volts, well you do the math.
I have seen this suggestion of a voltage drop for the 2 GHz
device touted before by AMD enthusiasts. What is its original
source? Given the Opteron's apparent persistent frequency yield
problems to date it seems unlikely IMO.
In order to get significant reduction from 100W, does this sound like a simple stepping to you? It doesn't to me.
That depends on the type of changes needed to bring down the
power. It isn't uncommon for dynamic power management features
to be partially or fully disabled in early steppings of a new
design because DPM can cause di/dt effects that can conceal or
distort signal integrity and speed path problems. As the design
is better understood and more of the DPM characteristics and
logic is verified the more DPM capabilities can be enabled.
Chipguy, Re: on all public roadmaps from Intel the release of Dothan was never earlier than 1Q04.
Maybe I didn't pay close enough attention, but I thought Intel had aimed Dothan for EOY 2003 for a long time now.
Ok, maybe I was thinking of production shipments instead
of introduction. Regardless, the gossip site(s) had Dothan
pegged for shipping a lot earlier than EOY 2003 before they
backtracked so I am not convinced this is a real slip based
on their word.
However, Geode is an incredibly underperforming SoC design, clocking at 366MHz max speed at the .15u manufacturing process. It integrates a lot of functionality, but it's hardly a perfect balance of performance and power. X-Scale beats it handily at that.
Does this seem like AMD is just throwing more money at its search for profitability? Or is it a true effort to diversify beyond Intel's strongest portfolio?
It looks like AMD is not planning to retire the K7 core yet.
A Geode style SoC based on K7 might be quite interesting. If
AMD didn't pay too much for these guys it might prove to be a
good long term investment.
Intel Dothan notebook chips postponed until Q1 next year
Heat dissipation a problem?
http://www.theinquirer.net/?article=10887
AFAIK on all public roadmaps from Intel the release of Dothan
was never earlier than 1Q04. Only the gossip sites claimed it
was pulled into 2003. IMO these guys were dead wrong in their
original prediction. LOL, then they have the chutzpah to try
to make a story out of what for a regular paper would be a
correction notice.
chipguy, just had a desire to pick with you a little bit and make sure that you have something good to say about new Opteron speedgrade.
Something good to say? Well 1248/1209 beats last year's
estimate of 1202/1170. We just don't know how much of that
delta to attribute to improvements to Opteron and how much
to improvements to Intel's compilers. :-P
Will you call the Merced launch premature then?
No it was late. Where have you been?
Or Williamette? Do you recall that Willy was slower than Athlon all the time, dispite Blue mans promises?
Perhaps you have a different definition of "slower" than I do.
When the P4 was launched at 1.5 GHz it yielded 524/549 SPEC
base2k. At the time AMD didn't publish a SPECint figure and
its SPECfp_base2k of its fastest device (1.2 GHz K7) was 304.
By spring 2001 the Athlon was up to 482/414 but the P4 was
faster too with a speed bump to 1.7 GHz.
Chipguy, I think he means IBM getting into the business of supplying the worldwide demand of microprocessors, rather than their own exclusive use. I agree that IBM is unlikely to become a microprocessor supplier;
IBM is already a worldwide microprocessor supplier. It sells
millions of PowerPC MPUs and MCUs into the embedded control
market. Not to mention the uPs it sells to Apple. It already
supplies the uP for the Dreamcast console and it reportedly
will supply CPUs for future Sony game consoles. To claim that
IBM isn't in the CPU business already is clearly mistaken.
wbmw, IBM is moving away from hardware toward services, so I think they would not want to get into the processor business.
Ummm, IBM is heavily in the processor business, from $10 embedded
CPUs to mega processors like the POWER4. Perhaps you meant they
wouldn't want to get into the x86 processor business. Considering
their track record dabbling in x86 in the past IMO they would be
very loath to get back in. After all, how many times does it have
to get its fingers burned to learn.
I recall after Opteron launch chipguy spent several weeks stressing that AMD management promised SPEC_int score of 1200 and how they lied about that. He was pretty bold on that topic.
Now, 3 months and 2 weeks after Opteron launch AMD finally delivered the 1293 SPEC_int score, but I don't see chipguy to be here to take his words back.
What's to take back? Weber's comments were quite clear. Either
he lied about performance or AMD launched Opteron prematurely
instead of waiting until now when it is finally fully meeting
announced initial frequency and performance targets to launch.
Probably he is spending today in talk with his Intel PR manager to get instructions on the next thing to blame.
Not quite as pathetic as Joe's nipple talk, but this is clearly
an ad hom attack. If it is not dealt with then I'll assume the
TOU is no longer in effect.
It's a rather obvious course of events. AMD has products that are very competitive with Intel's, but AMD the company hasn't the juice to market them. As a result, AMD is worth $2.5 Billion while its somewhat larger mirror image, Intel, is worth $164 Billion. If some company with power in the industry (like IBM) buys AMD, AMD will likely be worth $25 Billion (or a lot more) overnight, simply from having gained credibility.
More like AMD is worth $250m overnight. The second IBM buys AMD
then K7 and K8 become IBM house brand processors and instantly
become far less attractive to other OEMs than they are now. In
the short term AMD's worth would be defined only by how many K7
and K8 processors IBM can ship in its boxes and over the long
term by how many AMD R&D employees IBM could retain.
What do you think AMD would be worth the morning after Microsoft bought them?
What makes you think the feds would permit such a sale?
In any case such a move would be tantamount to a declaration
of war on Intel by MS and it would embroil most of the computer
industry in a kind of civil war. MS is run by businessmen, not
bomb throwing anarchists.
Chipguy, directory-based coherence schemes are only useful when most of a processors memory accesses are to local memory.
You still haven't said why you believe that. Do you claim that
an EV7 like distributed directory scheme wouldn't provide the
same or better system level performance at 4 or 8 CPUs than the
K8 broadcast scheme?
As for directory-based coherence schemes, that's really only useful for NUMA-based applications.
Why would you say that? For a non-trivial number of processors,
say 4 and up, a distributed directory scheme like implemented
by the EV7 has a similar ratio of worst case to best case memory
access time ratio to a broadcast and wait based architecture and
a much better average to best ratio. So in that sense a directory
scheme is more "UM", not more "NUM".
So you must think HT is a waste of time, since Windows 2000 doesn't support it.
No my Athlon system doesn't support it. But my next system probably will.
A single chip within a multiprocessor system needs to verify that the piece of data it is requesting from the main memory is not present in the cache of another chip. With Opteron, each chip is responsible for making sure that data is not found on one of its neighbors, while in other multiprocessor systems, a centralized chip monitors the cache contents of all the processors, Brookwood said.
Brookwood is talking about a centralized directory based cache
coherency system. A much better scheme is a distributed directory
scheme like in the Alpha EV7. The cache coherency logic is still
distributed among all the processors, giving cost and performance
advantages from integration, but it works much more efficiently
than the current Opteron's broadcast scheme as the CPU count goes
up. Unfortunately for AMD this technology is complex and in the
case of EV7 took years to perfect. Just about the entire EV7 team
from Peter Bannon on down now work for Intel on the design of
future IPF processor(s).
Chipguy, how do you turn HT on or off from within Windows XP?
I don't know. I don't use Win XP. Hey Petz, how do you switch
between trapping on FP denorms and rounding to zero in Win XP?
Did you not notice chipguys posts about HyperThreading, and Opteron code size that were intentionally misleading half truths?
You sure like bringing this HT thing up again and again. Let's
have a close look at Joe's canard.
1) You said "One difference in this situation is that HyperThreading is either always on or off. You choose at boot
time." in this post
http://www.investorshub.com/boards/read_msg.asp?message_id=964186
2) I replied "Wrong. It is selectable on a per process basis. An
OS that properly supports HT should allow you to set an attribute
on each application as to whether you want to allow it to run in
multi-thread mode or force single thread mode." in this post:
http://www.investorshub.com/boards/read_msg.asp?message_id=964245
The P4's ability to freely switch between multi-task and
single task mode is documented here:
http://www.intel.com/technology/itj/2002/volume06issue01/art01_hyper/p09_task_modes.htm
This page describes how a P4 transitions betweem single task
mode and multi-task mode. Sorry Joe, no reboot required. :-P
Joe got his nose out of joint because I failed to check the
status of all OSes for the P4 to see if any supported flagging
of apps for single task mode execution as I suggest. He has
stated my omission was both deliberate and misleading. If only
Joe was half as diligent as he asks others to be he wouldn't
have LIED about needing to reboot a P4 to enable or disable HT.
How do I know Joe lied instead of making an honest mistake? Well
I really don't know but I will use his own guilt by assumption
principle by which he accused me of making a deliberately
misleading statement (although I clearly qualified my comment
with "An OS that properly supports HT should allow...". Too
bad Joe's reading comprehension isn't as strong as his sense
of self righteousness).
With his experience and brains, he could definitely be an asset to a board like this, if he was intellectually honest (funny that he brings up intellectual honesty).
Funny you bring this up as an example of *my* intellectual
dishonesty. Physician heal thyself.
Thank you for saying it so eloquently. I am tired of these posters who do nothing but insult our intelligence. What they hope to gain from being here I have no idea.
So posts that contain reasoned logic arguments about business
or technical issues related to AMD that you disagree with insult
your intelligence? Perhaps your inability to counter them is why
you feel your intelligence has been insulted.
Chipguy, read the above agsin. Then go away and get a life.
1) I will not.
2) already have one but thanks for your concern. ;^)
Interesting you're talking about attacks. Looks like it your post that was deleted.
Check again. BTW, check the header for this board near the
bottom. I don't your comment is permitted under the TOU.
You are here just to create mischief?
Since when is bringing fantasy merchants down to earth
creating mischief? IMO only an intellectually dishonest
person would think so.
Any comment?
Maybe if its really successful it could increase TMTA sales by 20%.
That would bring it to $6m per quarter. How much sales does it need
to break even?
The general manager of Sharp's North American operations said they tried to build the MM10 with Intel's low-voltage Penitum M, but couldn't."
Perhaps in a year the Sharp GM will be saying they tried to sell
the MM10 with Crusoe inside but couldn't.
My guess is with all the demand for Banias and so little for
Crusoe Intel wouldn't price discount for Sharp nearly as much
as Transmeta.
If the main competitor doesn't have any competition that stumble you refered to won't have happened.
If it wasn't for AMD then DRAM vendors would have capitulated
to Rambus and Intel wouldn't have had to backtrack? That is
like a rooster taking credit for making the sun come up.
Perhaps if you had a more balanced perspective then people would take you more seriously. All negative and no positive.
As a investor, I don't want to hear the constant droning of a pro-Intel person who can't offer any observation other than the negative.
If what I was saying wasn't mostly bang-on then others could
refute it using fact and logic based arguments, not childish
ad hom attacks. What you are really whining about is the fact
that isn't happening and so perhaps the AMD polyannas aren't
right after all. That scares you because you don't seem to want
to know the truth. Sorry kid, I am not going away so you'll have to
put me on ignore. Sticking you fingers in your ears and shouting
na na I can't hear you in reaction in negative news and analysis
seems to be your cup of tee. Good luck with your investment.
It is fun to poke holes in the fantasies of the true believers
here. And if my comments help provide some balance against the
polyanna tales of the usual suspects for anyone who wanders in
here to learn about the issues facing AMD as an investment then
I consider it my good deed for the day. :-P
And you gave no answer for the 64-bit desktop market, since Intel's mouthpiece still claims it doesn't exist.
Duh, it doesn't exist. Show me a shipping 64 bit PC running
a production 64 bit OS. There are hundreds of millions of
32 bit PCs out there with >100m more added to them every
year. And not a single 64 bit PC running 64 bit OS and apps.
It looks like a non-existent market to me.
It can be done, as AMD demonstrated with their Athlon processor.
AMD was profitable for what, 1 year, while Intel languished
with Coppermine frequency yield issues and self-inflicted
gunshot wound with Rambus? That was the best AMD could do
with a perfect storm combination of Intel mis-steps and a
superior product.
After Willamette was available with a non-Rambus chipset
AMD's suffered a growing reversal of fortune in both market
share and profitability. By the time Northwood fully ramped
AMD lost all of its hard fought gains from Athlon and hasn't
recovered since. Any company that needs its main competitor
to stumble to make any money at all doesn't seem like a good
investment to me.
I was hoping for a serious post, but it is just another "make AMD go away" wish of a person attached to Intel nipple.
What did the pigs say in Animal Farm? all animals were equal
but some were more equal than others. Orwell liked to point
out institutionalized hyprocrasy.
I'm just trying to figure out which is more likely: that someone will become the victim of a lightning strike, or the victim of an Itanium purchase....
Trying to bring this mindless and innumerate rant back on
topic, either scenario is far more likely than consistently
making money going long on AMD.
Itanium is not an industry standard.
Let's have a look at 64 bit architectures and count the
number of major OEM supporters:
11 - IPF (HP, SGI, IBM, NEC, Unisys, Bull, Dell, Fujitsu,
Hitachi, Toshiba, Mitsubishi)
2 - SPARC (Sun, Fujitsu)
2 - PowerPC (IBM, Apple)
1 - PA-RISC (HP)
1 - Alpha (HP)
1 - MIPS (SGI)
1 - AMD64 (IBM)
Sure looks like an industry standard to me.
While it's more likely that you'll buy an Itanium system than be struck by lighning, it's not by a whole lot (a little over 700 people are struck by lighting in the US, each year).
Come to think of it, those sales figure we've seen for Itanium are total sales - you may actually be MORE likely to be struck by lightning than buy an Itanium.
This is a disingenuous argument because the class of machines
that IPF goes into are beyond the budget of the vast majority
of all individuals. And the class of applications currently
available for IPF is of little interest for personal use. You
might as well ask how many people buy quad channel 10 GHz DSOs.
Has HP ever announced when they plan to completely phase out their PA-RISC product lines?
I think they have committed to supporting the product line until
the end of the decade. The as-yet undelivered 130 nm PA-8800 will
likely be the last retread of their 7 year old 8xxxx core. IIRC
HP recently stated that they expect that sales of their IPF based
machines to overtake PA-RISC machines in 2005.
chipguy, you are comparing apples to oranges. Show me Deerfield benchmarks before we continue this performance talk. Itanium has too much cache to compare it directly with Opteron.
ROFL, what a pathetic whine. How much does AMD charge for
an 846 Opteron? If AMD can't deliver a decent amount of
on-chip cache for that price, and the performance that you
seem to think that would automatically go along with it,
then perhaps AMD didn't get its priorities right in the
first place. Either that or AMD is simply incapable of
delivering a top end server processor due to shortcomings
in design and/or manufacturing.
We can already see it in Itanium, which is a processor in trouble. Intel had to put in 6MB of cache to get decent performance out of it.
And AMD put SOI technology, 9 levels of interconnect, and an
integrated memory controller into Opteron and it still comes
out well behind I2 in performance. If I2 is in trouble techn-
ologically then Opteron is on life support and fading fast.
The AMD product gives a clearly better machine at a significantly lower choice
Which AMD characteristic(s) "gives a clearly better machine"?
Is it lower CPU performance than Banias, lower FSB/memory
subsystem performance than Banias, or higher power consumption
than Banias? Just curious.
SGI to concentrate on Linux, restructure?
I think you missed the fact that Linux is the enabler of SGI's new Itanium 2 based flagship Altix 3000 system. If Itanium were bad as you claim, SGI wouldn't be focusing more of their resources on it at the cost of restructuring.
You should know by know that Dan3 never let's mere facts stand
in the way of a superficial one liner.
The focus on Linux likely means that SGI is accelerating its
plans to move its user base from MIPS/IRIX to IPF/Linux. Look
for SGI to either drop the R18K before deployment or at least
announce the end of all MIPS development beyond the R18K. It
would be too bad for the engineers involved but clearly SGI
is in no shape to stay in the uP design business. Fortunately
there is a thriving MIPS presence in the embedded control
market so these guys have alternatives careers open to them.
Too bad AMD isn't in shape to hire a few, it seems in need of
fresh blood in its Alchemy group.
If IBM had instead chosen Motorola's 68000 CPU, I wonder who they would have chosen for a second source.
Motorola had a number of second sources for the 68k including
Toshiba and Synertek.
Needless to say, the entire PC market would look a whole lot different now.
Probably PowerPC based.
Re: At any given time Intel can use slack in one area, power headroom early in the frequency ramp for example
Yikes! Imagine Prescott once they use up the "power headroom slack."
Apparently I'll will have to supplement my explanations with
simple crayon illustrations if I want to convey the correct
meaning of even moderately complex concepts to the entire
readership.
Intel bet that SOI was an expense they could skip for the next 3 years, and that bet is starting to look a lot like the one they made on Rambus.
Why not make a much more accurate and closer analogy. Intel
bet they could skip SOI until FD SOI technology is practical
and necessary. Just like they bet they could put off copper
interconnect at 180 nm. How much extra money do think Intel
earned for shareholders by delaying BEOL conversion to copper
until 130 nm?
The flip side of that is what amount of AMD's staggering losses
over the last 8+ quarters do you think could have been avoided
by delaying copper and SOI as Intel did?
So we have this big fat rumour that P4 blows and Prescott TDP is 103W instead of planned 89W. That's pretty bold rumour. How should we take it? With a grain of salt or with a bag of salt?
Power is a very complex issue that encompasses design, process,
yield and cost. At any given time Intel can use slack in one
area, power headroom early in the frequency ramp for example,
to get maximum benefit in another area, maximize parametric
yield and minimize variable costs. As the design and process
matures frequency can rise without a proportionate negative
effect on power, yield, or cost. Remember, Intel is in business
to make money, not to superfluously pad chips specs.
Why not look to the past. Pseudo-technical Intel critics used
power based arguments ranging from handwaving to detailed and
superficially compelling to "prove" that P4 was in trouble in
the desktop, it couldn't be used in mass market machines, that
Willamette could never run faster than 1.7 GHz and Northwood
could never run faster than 2.5 GHz. In other words if history
has taught you anything at all it would be that it is unwise
to dismiss Prescott on the basis of early rumors.