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gollem,
Sharky Extreme did an X2 review, and even the very pro-Intel author (Vince Freeman, one of Rambus shills) can't do much, but show that Intel dual core is an embarrassment in games:
(Game benches start on Page 7 here:)
http://www.sharkyextreme.com/hardware/cpu/article.php/3261_3565416__7
Anybody who buys a gaming machine from Dell is a clueless newb (Ideal Intel customer BTW).
Joe
Keith,
INTEL dual-core gaming push
Intel knows that knowledgeable people know, that just about all of the games run better on AMD processors, single or dual core. But Intel does not care what knowledgeable people think. It's all spin, PR.
It kind of reminds me Intel statements that HyperThreading was there to somehow prepare the market for true dual core...
Whether it is true or false, it does not matter to Intel. Most people don't know one way or another. Intel will always get their stooges to parrot whatever the current Intel PR is. Dollars are rolling in. So everything is peachy...
The companies shilling for Intel in that PR piece will get Intel logo on their games, and a check from Intel...
Joe
Keith,
I don't know the answer.
Joe
Analysts on Wall Street whisper that the IPO's pricing, currently listed at $16 to $18, could come under severe pressure, as investors might hesitate to pour money into a company whose business is contracting and in the red. “
Leave it to out friend Olga to come out with anti-AMD spin, no matter where the facts are. Nevermind that alotment of shares was just increased, and that the price may end up on the high end of the range...
Joe
What's going on with CRAY?
Well, it's up. No news today...
Joe
Was this in the US English edition from the start, or is it an addition for the US addition as well?
Joe
chipguy,
Digitimes reports that Intel has given up on 667 MHz FSB on Montecito:
http://www.digitimes.com/mobos/a20051117A6021.html
which probably is not a news to you:
http://www.investorshub.com/boards/read_msg.asp?Message_id=7916667&txt2find=667
since 2 GHz seems to be hard to reach
Joe
Bobs,
Maybe I'm going nuts but did HPQ change the data on
No you are not going nuts. That's a previous Q report, which I used to get the Itanium QoQ numbers.
Here is current:
http://www.hp.com/hpinfo/investor/financials/quarters/2005/q4presentation.pdf
Here is previous Q:
http://www.hp.com/hpinfo/investor/financials/quarters/2005/q3presentation.pdf
Joe
chipguy,
Yet according to Gartner HP sold $411m of IPF servers and
$913m in PA-RISC servers in 2Q05. The sum, $1.32B, is more
than total BCS revenues going by HP's quarterly reports.
They probably include storage, which on HP report is a separate category from BCS.
As far as something that Keith is attributing to you, which is that some Itanium servers running Windows are in the ISS group, I found this description of ESS, which contradicts it:
Enterprise Storage and Servers provides storage and server products.
Business critical servers include Reduced Instruction Set Computing (RISC)-based servers running on HP-UX, Itanium® -based Integrity servers running on HP-UX, Windows® and Linux and the HP AlphaServer product line running on both Tru64 UNIX® (3) and Open VMS. The various server offerings range from low-end servers to high-end scalable servers, including the Superdome line. Additionally, HP offers its NonStop fault-tolerant server products for business critical solutions.
Industry standard servers include primarily entry-level and midrange ProLiant servers, which run primarily on the Windows®, Linux and Novell operating systems, and HP's BladeSystem family of blade servers.
HP's StorageWorks offerings include storage area networks (SANs), network attached storage, storage management software, as well as tape drives, tape libraries and optical archival storage.
http://www.shareholder.com/Common/Edgar/47217/1047469-05-22690/05-00.pdf
(page 35 of the document, page 40 of the pdf)
Joe
Bobs,
If my math is correct, HP sold $211M worth of Itanium based Integrity servers last Q and $258M this Q.
http://www.siliconinvestor.com/readmsg.aspx?msgid=21896088
Joe
PS: 65% growth in blades looks impressive. I think blades is one area that has a complete Opteron offerings (unlike other server segments, where Opteron covers only some segments). So the chances are that Opteron is what made the difference for HP in blades.
Rink,
Sources said MSI has a Socket F dual board with two HTX slots likely to [be] available in February
But there will not be any Socket F chips in February, well, unless AMD pulls in the schedule from mid 2006 to Q1 2006...
Joe
mmoy,
One other interesting note was that there's a link in the article to Microsoft's HPC foray where they explicitly state that they are geared up to support Xeon and AMD Chips. Someone was conspicuusly missing though that was discussed here some time ago.
Maybe Itanium is not suited for HPC market...
Joe
fpg,
More related to Yonah (and Sossoman) is that it will not be able to use the upcoming Cluster Edition of Windows coming up shortly.
Joe
Rink,
Thanks
Alan,
chips sold is the lowest of 3 components:
- demand
- fab capacity
- packaging and testing capacity
Fab capacity is the least likely to be the bottleneck in 2006 (IMO), especially in H2.
Joe
Keith,
There is a vague line, under A64 and X2, that may turn out to be the most important issue for 2006, especially H2:
"High Performance Energy Efficiency"
Joe
Alan,
Don't forget that AMD has been demand limited (and by Intel monopolistc practices) from Q4 2000 to (most likely) Q4 2005. Just becasue AMD can theoretically double within next 12 months, it doesn't meant AMD can sell it.
If demand does turn out to be beyond those estimates, AMD can increase Fab 36 ramp. But it is unlikely - unless some major F-ups happens with Intel, such as dropping the basket (Merom) where all of Intel's eggs are.
Joe
Mike,
I think AMD used to use UMC as a foundry in the past. Geode, OTOH, may be fabbed by TSMC, since that's where NSM fabbed it (AFAIK).
Joe
chipguy,
What interesting piece of
software of relevence to the mass market will be available
as a 64 bit binary only within the next 4 or 5 years?
I think you are going a little too far out on the limb there. There are computer games out today that barely run with 1 GB of memory. You think doubling this will not happen in 4-5 years? I think it happens faster than that.
Most software surely will have 32 bit versions, but you are clearly speaking of second class citizenship -> bargain bin.
On the other hand, people who run leading edge software upgrade more often than once in 5 years.
Joe
Durl,
So you think that MS will ignore Intel's Montecito?
Given MSFT statement that those apps "will be exclusively 64-bit and optimized for x64 hardware," is a strong indication of a low priority Microsoft places on the Itanium line.
But it is not necessarily a bad news for Intel. Intel has 64 bit Xeon line that will be able to run these apps...
Joe
Durl,
Perfect, so you think it matters now that Opteron runs 64 bit software that doesn't exist faster than Intel runs the same software that doesn't exist?
Second strawman reply to my post...
Joe
And I hope you don't short Intel stock based on a Digitimes article.
What in the world is this comment based on?
Joe
Durl,
You Droids want the bad news? The success of Opteron depends NOW on how well it runs 32 bit against Xeon. The success of Opteron two years from now will be how good it runs 64 bit against Itanium Montecito.
I hope you are not basing any of your stock trades on "analysis" like this one.
Joe
After K9 was killed, K10 core looks to be on life support:
http://www.theinquirer.net/?article=27421
Joe
Alan,
Ok, I see what you mean.
Joe
Alan,
I get cheapest P-M is $209 while most expensive turion is $268...
Did you look at the price list here?
http://www.intel.com/intel/finance/pricelist/index.htm?iid=InvRel+LeftNav_Pricelist&
Pentium M prices range from $209 to $638.
Joe
wbmw,
Agreed. This was never the case. Cyrix CPUs generally performed terribly.
There was a time period when Cyrix CPUs had excellent performance, on balance best integer performance, not so good floating point. They excelled at running Office apps (at the time when MSFT Office was somewhat demanding on the CPU), sucked at increasingly popular 1st person shooters.
Joe
w.t.
If that is true then why do you need chipset/BIOS support for Cool'n'Quiet? I'm sure the processor can get its standard voltage from the VRM, but it does not automatically do all the PowerNow features.
It certainly needs to be supported by BIOS. BIOS is code (and data) that runs on the CPU. It all runs on the CPU, and CPU makes the requests for the right voltage. Unless I am missing something, I don't see why CPU would need to communicate any of this to the chipset.
Joe
w.t.
AMD has talked about Partitioned PowerNow to power manage each core seperately. This could be the reason that they needed small changes and broke chipset compatibility a bit.
I think it is unlikely tha HT would be involved in this. There may be more power pins to power different parts of the CPU, but I don't see how HT would be involved.
HT 3.0 may change that, or some other new feature in HT, but I think it would not be a good idea for AMD not to maintain compatibility with older HT releases.
What may be possible is that M2 may some new features, such as faster speed, and to take advantage of them, you need more up to date chipset, but as far as client machines, it doesn't seem to me that HT is a performance bottleneck. The bandwidth now is 4 GB/s each way, and CPU memory accesses don't use up any of the bandwidth (except peripheral memory accesses).
An extreme case may be 2 full 16bit PCI-Express lanes...
Joe
w.t.
Look at this, section 6. There are four pins for clock outside of the HTT part and lots of voltage / power management related things under "Miscellaneous".
There is no reason for these to communicate with chipset. There are a bunch of pins that connect to the voltage regulators, and there is some negotiation between the 2, when CPU tells it how high the voltage should be.
Joe
w.t.
NVIDIA's roadmaps do not reveal any information about what this update might be other than a slightly different electrical interface for Socket M2
The only interface to the CPU is through HT. If there are electrical changes, it would suggest HT 3.0. And even then, HT has been downward compatible.
AMD may still keep HT 2.0 and up the clock speed to the 1400 MHz maximum for HT 2.0. Since HT is downward compatible, there is no reason why delay of one nVidia chipset should hold up the CPU release, since it should work with existing chipsets.
The whole thing about M2 CPUs is a little weird is that most people expected late H1 intro. Then, within last 2 weeks or so, some people apparently got samples, and suddenly, some people claimed that M2 will be released in Q1. Now, 2 weeks later, we are back to late Q2.
Joe
avatar,
I notice the TDP is very close to the max power.
Maybe Intel is just more honest about server processors. IIRC, some reviewers had some doubts about specs of Smithfield power numbers.
Joe
Combjelly,
I do have a relationship with AMD though. I own the place. Well, a (small) part of it.
Joe
tecate,
ROFLMAO. let me try this one more time. Ignore, I'm sure you know how to use the ignore this poster feature right? If that is too hard, post pack and I will explain how to use it.
The point of moderated forums is that if someone is on purpose trying to be a pest, that poster can be banned. It seems me that is your intent - to be first poster to be banned here.
Joe
Darbes,
Y bother ?
Ask Hurd, I guess...
Joe
Hewlett-Packard is expected to announce its first blade servers that use Intel's Itanium processor on Tuesday, sources familiar with the product plans said.
http://news.zdnet.com/2100-9584_22-5920029.html
wbmw,
I didn't say that the packaging cost of Pressler will be the same as Power5, but it is going to be more than Prescott. All I am wondering about is approximate cost.
Joe
chipguy,
OTOH IPF systems don't have cache
beyond what is on the MPU. That represents a huge saving
in package pin count/internal routing, signalling power, and
system level physical design complexity for IPF systems.
Can you quantify "huge"?
The reason I am asking is because I wonder if Pressler, being an MCM with 2 die and all the issues involved will be significantly more expensive to make and package, or if these costs are just noise (10% or less).
Joe
oc detective,
Spokesman for AMD (cant remember who) claimed in an interview with Anandtech that the performance hike moving from DDR to DDR2 667 (333Mhz) on similar cpu frequencies and L2 cache was in the range 10 - 15% for dual core.
I would have easier time accepting the range of 0 to 15%...
Joe