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Nice Micron flash article:http://www.digitimes.com/NewsShow/Article.asp?datePublish=2004/03/24&pages=PR&seq=204
Kind regards,
Rink
AMD involved in ultra low k (2.4) CVD development: http://www.reed-electronics.com/electronicnews/article/CA405960?industryid=21366&industry=Capita...
Kind regards,
Rink
Intel buys 802.11g company: http://www.theinquirer.net/?article=14964
Kind regards,
Rink
Petz, wanted to edit prev post but couldn't anymore: I think you're right about the statement that over half of Q1 wafers would be for K8. I think they might have made that statement during earnings CC for Q3 last year. It might have been outdated by incompetence...
Just checked the Q3 CC. Here it is:
Krishna Shankar - JMP Securities.
Q: ...you said in Q1 of 04 you expect 40% of your wafer starts to be Athlon 64 based. When could we see the cross-over between Athlon 64 units and Athlon XP units next year?
Ruiz:
A: Let me just correct a couple of numbers. As we expect in the first quarter that half of our wafer starts will be on the AMD64 architecture. That is a mixture of servers, workstations and clients and we anticipate given the projections that we have, 60% cross-over will occur by end of next year. ...
Kind regards,
Rink
Paul, ok, the Acer I'm eying is here: http://www.acer.de Click 'notebook' and look for Aspire 1500, model 1501LMi
1.8GHz A64 3000+,
Mobility Radeon 9600 64MB,
dual DVDRW,
60GB HD
3 in 1 card reader,
15.0" SXGA+ TFT Display,
802.11g
It's a beauty.
Kind regards,
Rink
Petz, 2 is out of the question. There's only one HP and one Compaq notebook that sells with one K8 XP with one frequency this quarter. So this would have absolutely no influence whatsoever at all for this quarter.
So xbit lab is plain wrong, or plain right (we simply don't know). Combining Xbit labs story with Keith's hint would make it right stating those low numbers. AMD never said publically how much K8's they'd make in Q1. Xbit labs story fits with Henri Richards comments; it also fits with previous guidance.
About your possibility #3: Opteron demand should be rather healthy but not breath taking unless I'm not getting it (the article didn't talk about socket 940, so Intel rebranded Opteron's would do the trick;). Don't give it a chance really to explain those low numbers though.
Still CPU demand seems to be a bit better than seasonality patterns would suggest, and lower than in Q4, meaning quite a lot of P4's and AXP's got sold. Buggi's flash graphs show price hikes that indicate to me demand of AMD's NOR is pretty darn good: Flash just can't be lower than Q4.
Overall I think there are enough indications that we at least seriously need to consider that xbit lab might be right here.
Something else I'm thinking about getting myself an Acer Aspire 1501LMi notebook: http://www.acer.de/acereuro/page4.do?dau22.oid=4181&UserCtxParam=0&GroupCtxParam=0&dctx1....
Kind regards,
Rink
Mark Edelstone, MS:
Q: First question is on the Athlon 64 and Opteron product line combined. Obviously you had a good momentum here so far. Do you have the ability, do you think, to be able to produce and ship as much as a million units here in the first quarter...
Ruiz:
A: Let me just talk about our capability in general terms, Mark. We currently are running our factory as a mix of 130nm both Athlon XP and next-generation hammer product. We -- if I -- at the risk of sounding somewhat simplistic here, it's kind of like a knob that we're dialing, and as to how much of that we want to be Athlon XP and how much we want to be Hammer... We're basing the market with our customer very carefully as to what they want and need and planning this result from the beginning because we anticipate the beginning of the 90nm conversion to really give us a big boost in our capability for particularly the K8 hammer architecture, but even at the 130nm I want to make sure it's clear that today, we have the capability of doing if we'd wanted to, more than a million a quarter, so we're throttling that based on our plans, which are, you know, how to penetrate particular customer segments and accounts and the expectation in the second half of the year, other things will occur relative to software, where we eill then be at 90nm and be able to execute a little more leisurely how many units we can produce.
Mark:
Q: When you tweak the knob, so to speak, ... etc...
Kind regards,
Rink
AMD to supply chips for Founder computers in China
Thursday March 25, 6:52 am ET
HONG KONG, March 25 (Reuters) - Advanced Micro Devices Inc (NYSE:AMD - News), the world's number two maker of central processing units (CPUs) for personal computers, said on Thursday it reached a deal to sell its chips to one of China's top three PC vendors.
This is U.S.-based AMD's second major deal with a China-focused personal computer seller.
The company is battling to grow in the world's second largest PC market, which is dominated by Intel Corp (NasdaqNM:INTC - News), the world's top maker of CPUs.
Under the new memorandum of understanding, AMD will supply its cutting-edge AMD64 chips for use in PCs to be built by Founder Group (Shanghai:600601.SS - News), which controls between six and nine percent of the Chinese market.
AMD, which is based in Sunnyvale, California, said products from the alliance are expected to become available in 90 days.
"By combining the advantage of AMD's...technologies and Founder's...solid local resources, this alliance will serve as a launch pad for both parties to grow," said Karen Guo, general manager of AMD China.
Last year, AMD signed an agreement to provide CPUs to Hewlett-Packard Co (NYSE:HPQ - News), the world's number two PC seller, for some of Hewlett-Packard's China models.
China's leading PC seller, Lenovo Group Ltd (HKSE:0992.HK - News), which controls 25 percent or more of the market, buys all of its CPUs from Intel. Intel has spent considerable time and money building up its local manufacturing and distribution.
China overtook Japan last year to become the world's second largest PC market after the United States. PC sales in China totalled about 13 million units and the number is expected to grow 19 percent this year, according to International Data Corp.
Apart from the Hewlett-Packard and Founder deals, AMD CPUs are largely available in China only in "white boxes," which typically carry no brand and are often assembled by individuals.
http://biz.yahoo.com/rc/040325/tech_china_amd_1.html
Kind regards,
Rink
Condor, yep it's down. Guess it's a virus. (eom)
@Buggi,
Good post. I agree with that one. Tx for german A64 distribution comment; that helped me interpret something else.
JFYI, I mentioned more or less the same again here on SI (didn't entirely agree with your interpretation of Henri Richards comments; but do agree with your previous post): http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19946718
Kind regards,
Rink
"but with avoiding to answer, everyone should able to speculate in this or that direction - so he put an answer on the table that everything is as expected."
Even though I seem to put some more value in his comments I do agree you just as well could be right too.
BTW, tx for those nice flash numbers. FWIW I think Henri did imply profit. 7c would be very nice imo; 3c still be good. Intel guided to lower end of seasonality, AMD did not guide beyond previous statements (but don't have a habit of doing mid quarter guidance as religously as Intel either; so it doesn't mean that much).
Kind regards,
Rink
@Buggi, re: Without violating US
Laws he coundn't change any given guidiance, so its clear
that he just repeats that, what AMD said in the past. That
says nothing about this quarter.
He could have refused to comment, instead he confirmed. Therefore it's not an empty message.
Kind regards,
Rink
AMD: Q1 earnings < Q4. Chip demand to rise in H2:
Advanced Micro Devices Says Chip Demand to Rise in Second Half
March 23 (Bloomberg) -- Advanced Micro Devices Inc., the world's second-biggest maker of computer microprocessors, expects demand for its chips to rise in the second half of the year as companies buy new computers to replace those purchased in 1999.
Profit in the first quarter will be lower than that in the fourth quarter of 2003, said Henri Richard, vice president for sales, in an interview. Net income in the fourth quarter was $43.2 million, or 12 cents a share, the first profit in 10 quarters.
``We think we'll continue to have favorable retail demand and accelerating investment among companies' in the second half, Richard said. Profit in the first quarter ``will be in line with the seasonality of our industry' and below the fourth quarter.
Chief Financial Officer Robert Rivet said in January that he expects Advanced Micro to have a profit for the year. The company last reported an annual profit in 2000. Under Chief Executive Hector Ruiz, Advanced Micro has taken market share from Intel Corp. in flash-memory chips for cellular phones and computers.
Richard said computers bought in 1999 by companies to avoid problems they expected with the calendar move to the year 2000 were now becoming obsolete, which should lead to increased corporate computer purchases this year, particularly for engineering and other data-intensive applications.
In the first quarter of 2003, AMD had a net loss of $146.4 million, or 42 cents a share.
Link to above story: http://quote.bloomberg.com/apps/news?pid=10000103&sid=asKJ4P...
In line with seasonality; so not as good as some expected. Wonder what the split is between XP's/A64's.
Keith, may I ask if your firm's sales include K8's?
Kind regards,
Rink
Combjelly, do you know perhaps what the dielectrical constant of Black Diamond II is? I couldn't find the info. Black Diamond has a constant of 3.0.
EDIT: Just found it. Black Diamond II is due to have a k-value between 2.2 and 2.6 (probably closer to 2.6 than to 2.2), depending on the article.
Ref1: http://www.vr-zone.com/?i=443&p=1
Ref2: http://www.eetimes.com/semi/news/OEG20030627S0015
Ref3: http://www.spectrum.ieee.org/WEBONLY/publicfeature/feb03/film.html
Thanks + kind regards,
Rink
Sgolds,
You have to understand floating gate (the kind of nor flash everyone can make) and mirror bit (AMD/Saifun invention) are two distinctly different technologies. Both are mentioned by name throughout the presentation, and when they're not mentioned by name you don't know which they're talking about for sure (most of the times though it's the older floating gate that they're talking about then).
In that slide you're refering to mirrorbit is mentioned once. The other color blocks can very well all be floating gate (I think that is VERY likely).
Rivet did say Mirrorbit is now at 170 nm and will go directly (without going to 130 or 110 nm first) to 90 nm. That's our datapoint. Chances he made a mistake do exist but are very low.
The presentation has a couple of slides that talk about doing 130nm and 110nm mirrorbit as that was the plan, but they skipped it and implemented another plan. Possible reasons: tech. problem (they had problems shrinking mirrorbit before), or optimizing capacity for existing customer demand (for wireless and embedded floating gate devices).
Kind regards,
Rink
Dan, Re: Mirrorbit is now on 170nm.
Joe / SI transcript tidbit during Rivet's presentation last Monday: http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19867085&s=170nm
As I had to work I read what others said Rivet said. I saw a similar comment appear on yahoo but that doesn't mean too much I guess. It's possible there is a communciation error here somewhere but I do think Joe heard what he heard. Also AMD calls their process sizes for flash 170/130nm, and 110/90nm, and that was supposed to mean starting at 170 moving to 130, and starting at 110 moving to 90nm. I do think I miss some of the fine print. I have a feeling they might have changed their mind from producing 110nm mirrorbit in JV1/2 to producing 90nm directly in JV3.
BTW, FWIW, Infineon/Saifun twinflash nrom 'nand-compatible' flash is also on 170nm until end this year and will then move to 110nm: http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19662738&s=170nm
Kind regards,
Rink
Dan, that's probably outdated.
Mirrorbit is now on 170nm and it will remain there until Q4 when it will more directly to 90nm (so skipping intermediate 130 and 110 nodes). This is at least what I took from Rivet's comments last Monday.
When it has moved over I think it will actually be slightly cheaper than NAND (not entirely sure about this last point though).
Kind regards,
Rink
wbmw, re: I'm going to have to go with option number 3.
re: AMD has never aligned with Dell's volume and JIT requirements, Intel has always been the obvious choice.
Remember Opteron will not be replacing Xeon for Dell, it will just be offered as alternative. Also wouldn't it be logical that AMD would decrease desktop cpu volumes in favor of server cpu volumes. I think it's naive to think that AMD is unable to meet Dell's Opteron volume needs. Think about it like this: It's high priority for AMD, volume is relatively low (compared to a desktop win from Dell), AMD is has no trouble making good on any other commitment, so chances that AMD can meet Dell's Opteron demand are way higher than that it will allow itself not to meet it. A a big Dell desktop win is where your concern for volume would be more applicable.
re: When Dell gets an order for 5k DP servers, who is going to ship the CPUs faster?
Intel/AMD, no difference at all. AMD has about a month inventory (that's their target, that's what they've done for a couple of quarters in a row). Inventory is a buffer that is build according to what AMD sees as demand, and what they think they need as safety margin. Any Dell contract AMD will know about in time to change their manufacturing parameters accordingly. Aside from all of this 10K Opterons can be met easily now out of inventory.
re: who is going to ship the CPUs faster? AMD out of Dresden or Intel out of Chandler?
This is irralevant. CPU's are not shipped per boat as you know. And the commercial airplanes can fly over any amount of trays necessary. It might make a difference of a few hours but that is totally irralevant for Dell's JIT requirements.
re: Furthermore, who will have the features that Dell's customers demand? Intel's RAS optimized chipsets or AMD's one size fits all memory controller?
AMD's XN feature is arguably more important than PNI for many businesses. Opteron is performing better (meaning any potential future PNI benefit is a moot point). And, btw, Opteron has all RAS features available in Intel's chipsets (ECC, chipkill) for as far as the RA in RAS is concerned. Servicibility is top notch especially in those servers with a service processor, and those are currently quite well presented. Servicibility throught redundant and hot pluggable units is plenty available too. Hope this helps.
re: Finally, servers have a certain fixed life cycle, because it's too expensive to revalidate your product lines to compete with every ripple in the market. Dell is locked and loaded with Intel right now, so AMD doesn't fit within the product line.
I agree with you that once a business picks a certain vendor, and to a lesser extent a certain product line of that vendor, that they will stay with it for relatively long periods, like between a year and a couple of years. The vast majority of Dell's big customers is not really about to walk away from Dell. But some of the smallers will. Those that are about to renew their contracts will consider the opportunities at other vendors, and some will walk. And even a relatively small market share loss, e.g. 1%, will be rather unpleasant for Dell.
Kind regards,
Ixse
DARBES, LOL! Tx, Keith... (eom)
Keith, please explain?
Re: Nocona will not be going up against the Opteron we see from HP or IBM today. It will be quite a different beast. Interesting times ahead!
So either Nocona has features that will make it perform better in certain area's (e.g. where Northwood is already good), or it will go up against another kind of Opteron? Could you expand a little bit?
Thanks.
Ixse
Paul, Gollum, bummer, both my english & german is rusty (eom)
Chipguy, re: Ah the xbox business model. Good choice
Yep, for as far as the analogy goes ofcourse. It's a good choice considering their customers needs and their own.
Your "" indicates you think you're capable of making better choice than McNealy?
Just a side note: Your german is rusty. 'Schadenfreude' actually means something like 'harming joy'...
Kind regards,
Rink
Chipguy, no, the only question is if and how fast their software sales and increase in box volume will make up for the decrease in hardware margin.
Hope you like this one (not entirely sure if it hasn't been posted already - sorry):
Kind regards,
Ixse
wbmw/paul, here's the link again.
http://messages.yahoo.com/bbs?action=m&board=4687810&tid=amd&mid=926309&sid= 4687810
Please take out the space between between "sid=" and "4687810" at the end.
Kind regards,
Rink
wBMW, just for laughs, here's how one yaholic characterizes you: http://finance.messages.yahoo.com/bbs?.mm=FN&action=m&board=4687810&tid=amd&sid=4687....
Kind regards,
Ixse
Keith, I'm only a couple of hundred miles to your west maximum. I can quote but won't post it all.
Edit: Rupert could and did though...
Kind regards,
Ixse
Q403 Earnings CC Transcript (WSJ)
http://interactive.wsj.com/documents/transcript-amd-20040120.pdf
Edit: Saw posted it already.. Anyway, if anyone would need a specific quote, let me know and I'll look it up.
Kind regards,
Rink
Petz, Athlon register files. "the 88-entry 90b"
Think this might be what you're looking for (from Hans de Vries' bible ofcourse): The Floating Point Renamed Register File: http://www.chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html#2.1
Here's more. Integer Future File and Register File: http://www.chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html#1.11
Very indirectly related to this here's something else that I found interesting: The L1 instruction cache contains much more information than instructions (64KB) alone (38KB more to be precise): http://www.chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html#4.1
Kind regards,
Ixse
sgolds, forget my previous post (I forgot to reread the title of the article - !@$#$#).
Kind regards,
Ixse
Keith, when I read that article I thought it was because of the chipset pricecuts (I presumed they cut price to REMAIN competitive), and a bit of P4 oversupply in September (am I crazy?).
Kind regards,
Ixse
sgolds, you implied it was meant as a new delay because you relate it to the current stock drop (during the last 8 or so days). If you in fact meant it was refering to the delay announced in Q3 03 then it doesn't make sense to relate it to this current stock drop.
Kind regards,
Ixse
Paul, I agree with Doug. I don't see this message as a new delay (it's just an explanation of the delay till Q2 04 that was announced in Q3 03).
I keep on thinking we're missing the real reason: Why else would AMD be down till this level???
Kind regards,
Ixse
CJ, thanks for the details.
Ixse wrote: SSDOI (strained si direction on insulator; IBM; not here for years)
CJ wrote: strained silicon doesn't help with leakage, it's an electron mobility thing. This might make it to 65nm...
I was ofcourse refering to the DOI part of it, as you're quite right that strained silicon doesn't seem to help Intel with leakage (see IEDM report on RWT).
I actually also think some of the items you mentioned slated for 65nm might not make it to 65nm, SSDOI might be one of them. From how I understand it's manufactured it must be expensive too.
Also I don't think AMD "hopes to avoid high-k dielectric for as long as they can". I'm pretty sure they just don't have a viable solution for it yet, and don't expect to get that till after 45nm. I think Intel planning to implement this small holy grail at 45nm is something of a coup for them. Ofcourse all the planned AMD process innovations together could maybe make an equally great grail but high-k is supposed the be the greatest thing since sliced uhm silicon...
Kind regards,
Ixse
Paul, re: what are some of the possible ways to deal with other leakage issues.
What I know of are:
- low k dielectric
- high k dielectric (only Intel, only in 2007 or so)
- partially depleted SOI
- fully depleted SOI (AMD presented; not here for years)
- SSDOI (strained si direction on insulator; IBM; not here for years)
- multi gate
- metal gate
And there must be quite a few more.
Some of the above are further detailed in this article I posted yesterday on SI: http://www.realworldtech.com/page.cfm?ArticleID=RWT121303010053&p=2
Kind regards,
Ixse
Jules, re Or will the HTT increase [to 1000MHz] be strictly a chipset change?
Current Opterons and A64's are not tested and released for 1000MHz (possibly not designed for it either but that I don't know). From what we're hearing (meaning I haven't got any AMD confirmation of this) Newcastle will be capable of 1000MHz in addition to 800MHz and 600MHz. So Newcastle will work fine with existing chipsets. New chipsets will be necessary to enable 1000MHz HTT between CPU and chipset.
Hope this is what you were looking for.
Kind regards,
Ixse
YB, that's not what the original article said, that the Inquirer paraphrased (A LOT). It said: "And then a fourth chip major investment is going to be chip multi-threading and that one you will see start next quarter." Don't trust the Inquirer too much.
Kind regards,
Ixse
Tx CJ! (eom)
Re: "issues with low K" That makes everyone except for Intel has reported issues with low-k. Wanna bet that this is at least part of the reason for the Prescott slippage?
No, but if it is, the transition to 90nm is likely to be easier for AMD than it's currently for Intel. Strained silicon being another potentially good reason.
Just checking: Intel doesn't use low K dielectric for 130nm already?? I think I've seen an Intel presentation that said they are using it for their 90nm process (not sure though).
Kind regards,
Ixse
Elmer, Petz does have a point as AMD already demonstrated 90nm Opteron and dual Opteron systems twice now, and 50nm gates would be close to typical then. Also new production processes ramp slowly. I've seen the article mentioned that states samples in Q2 and believe it for the time being. Q2 samples are necessary for a release of the product in Q3 (and convenient for a release begin of Q4). In order to get sampling in Q2 AMD will have to start production of the samples in the second half of Q1 / first half of Q2 (I currently think second half of Q1 fits best with the information we've got).
BTW, I'm not saying that you're wrong in that AMD might have been talking about 130nm (instead of 90nm) but at this moment it's just not clear what process AMD was talking about - Petz' point at the very least makes sense too.
FWIW. Kind regards,
Ixse
Chipguy,
Tx. Pretty much my thinking too. I think it's not just yet time for SUN to put all eggs in one basket just yet. I think they have a pretty good idea of the two possibilities for them, and I think they'll work it out as follows: Keep further developing SPARC as prime high end cpu until it's automatically replaced by Opteron by customer demand. In the unlikely event that the future SPARCs do better than Opteron that's fine, in the event that Opteron eats into SPARC business a bit more than anticipated it will be a bitter sweet success (increase software base at the cost of decreasing hardware profit; at least they've greatly reduced chances of going out of business then). Also customers won't feel forced one way or another as they themselves are driving the change.
Here's an interesting utopia-like thought I'll entertain to see the value of one extreme end a bit more clearly: Eventually it might be better for SUN to bet the farm on Opteron and separate development efforts between them (>8 Opteron systems and matching chipsets and infrastructure) and AMD (1-8 way), which might pan out nicely for them as they'll probably get the high end benefit. No chance, also because of current long term commitments, and because as you say old architectures habitually die slow... I really think they're going the way as described in the previous paragraph (knifing or castrating USV while in the womb fits this scenario) and try to leverage part of the goodies in this paragraph at the same time.
BTW, are you going to do an article on this?
Kind regards,
Ixse