News 
Market Data 
Discover
Register for free to join our community of investors and share your ideas. You will also get access to streaming quotes, interactive charts, trades, portfolio, live options flow and more tools.
Yes! One step closer...
"January 10, 2024
LOS GATOS, CA / ACCESSWIRE / January 10, 2024 / Atomera Incorporated (NASDAQ:ATOM), a semiconductor materials and technology licensing company, today announced it expects fourth quarter 2023 revenues to be approximately $500,000, an increase from the prior guidance of $300,000 to $350,000.
In late December, Atomera achieved the second revenue milestone under its first commercial license agreement, triggered by customer acceptance of the MST process. Acceptance was achieved after the customer validated the quality of MST film deposition on an Epi tool in its facility. This follows an earlier milestone for completing the transfer of Atomera intellectual property, including the MST film recipe, to this customer.[FL1]
"Our first commercial licensee was able to complete installation of our technology and independently validate MST film quality just weeks after receiving our recipe, bringing them one step closer to commercial distribution of MST-enabled products," said Scott Bibaud, Atomera's president and CEO. "Our customer can now manufacture wafers with MST on their own which should speed development and shorten the time to mass production and Atomera royalties. This effort is a great example of how we work with the most advanced semiconductor companies in the world to improve transistor performance and extend Moore's Law."
I'll be on that one on the 16th for sure.
And another one- the first of 2024 🙂 (From Joe / the twits board)
Looks like another patent issued.
...and to dovetail on that, Joe posted this LINK Samsung eyes improved AI chips with "competitive advantage"
According to the report, the so-called GDP advantage represents three aspects of Samsung chipmaking. First, it references the gate-all-around (GAA) chip fabrication technology that Samsung has employed in recent production. It also includes high-bandwidth memory and advanced packaging technology. That’s how you get the acronym GDP: GAA, DRAM, Packaging.
From last month to show the relationship: “We are working with half of the world’s top semiconductor producers today and we have been doing work in GAA and in DRAM,” said Mears.
GAA, short for gate-all-around, reduces the leakage current of processors with a circuit width of 3 nm or below. It is Samsung’s key architecture to develop next-generation DRAMs and packaging technology.
The 3 nm technology is the first process node on which Samsung applied its first-generation GAA structure transistors.
...and then, 48 hours later on the other side of the country...(New York)
Benchmark 12th Annual
Discovery One-on-One Investor Conference {Atomera is one of the 'featured' companies}
Thursday, December 7th 2023 | 8:00 AM - 3:00 PM ET
Hosted at The New York Athletic Club
180 Central Park South, New York, NY 10017
Please join us for our 12th Annual Discovery One-on-One Investor Conference in-person at the New York Athletic Club. This unique conference format is designed to promote meaningful interaction between presenters and institutional investors from around the country.
Two of the other featured panelists are Lucas Tsai of TMSC and Jinman Han of Samsung 🙂
The first of its kind, Semiconductor startup forum on IC design & manufacturing services, hosted by GSME is bringing together to support innovative start-ups, small to mid-size private companies to evaluate, collaborate and discuss the ecosystem. Highlighted by a prominent keynote speaker and industry experts panel, the forum offers an engaging platform to connect, exchange ideas, gain knowledge, and build relationships at the vendor pavilion. We are looking forward to seeing you there!
Tuesday Dec 5th 2023 Check out who one of the Manufacturing speakers is 🤔😉
Vice President of Business Development at Atomera Aabid Husain
I was hoping it was a different company.
NEWS: Oct 16, 2023 | Atomera’s dopant engineering reaches 50% of top chip makers
Atomera Inc. (Los Gatos, Calif.), a company founded by Robert Mears, the pioneer of the erbium-doped fibre amplifier, is making progress with its semiconductor dopant engineering technology.
The company is now engaged at an R&D level with about two-dozen chip manufacturers and recently signed a full commercial exploitation license allowing STMicroelectronics to use its Mears Silicon Technology (MST) manufacturing process.
ST will use the technology to improve smart power products although the claimed benefits for using MST extend much more broadly. Benefits can be seen across applications from conventional logic to analog, RF and RFSOI, and sense-amplifier peripheral circuitry for DRAM and for MRAM and ReRAM. The technique is also effective in improving the performance of high-K metal gate insulation. There are also benefits in CMOS image sensors.
The company’s progress so far has been slow and painstaking. But the company reckons that with the development of nanometer-scale processes and such techniques as gate-all-around transistors, the market is moving towards the company.
In 2001, after his work on the erbium-doped fibre amplifier, Mears founded Nanovis LLC to exploit the nanometer-scale engineering of materials. Subsequently there was a name change to Mears Technologies before the company changed again to become Atomera in 2016 and closed an initial public offering of shares. ST took an initial R&D license to investigate the technology in 2018 (see ST licenses Atomera manufacturing technology).
Half of the best
“These things take time. We are engaged with a number of companies,” said Mears, CTO of Atomera, in an interview with eeNews Europe. Although almost all of Atomera’s engagements are still in the R&D stage they represent about 50 percent of the world’s top chip manufacturers, the company claims.
MST is typically used to deposit partial monolayers of oxygen on the silicon wafer surface. The introduction of these layers can be used to help enhance mobility and current flow in the x-y plane and reduce it in the z-direction – which would typically be leakage current in transistors. The technique is also used to control doping profiles. This control is not just in the z-direction but can also be used to control lateral diffusion. Thus, the introduction of structured monolayers of oxygen within crystalline silicon can be used to create highly precise doping profiles.
The introduction of partial monolayers of oxygen (dark lines in silicon cross-section) allows precise control of carrier mobility and dopant diffusion. Source: Atomera Inc.
“Typically, a number of oxygen layers are all part of the process tailored to a particular application,” said Jeff Lewis, senior vice president of business development and marketing at Atomera.
Improved mobility and precise dopant control can then translate into higher performance transistors and smaller logic die sizes. In power applications improvements typically include lower “on” resistance, higher breakdown voltages, and die size reductions of 20 percent or more.
Given these advantages why hasn’t Atomera made more progress, sooner?
Mears acknowledges that trying to retrofit MST to semiconductor manufacturing processes with established doping profiles has not been easy. MST adds an additional process step or steps in manufacturing and in the past may have then required multiple R&D iterations to characterize the dopant profiles.
In at the beginning
“There’s no doubt the easiest point of adoption is at the beginning of a development cycle,” Mears said. In the past, the greater part of node development was a geometry shrink with minimal readjustment of doping profiles, he added.
Also, there was some distrust of Technical CAD (TCAD) tools to model these things but there’s now more precision in TCAD tools, Mears said. “Increasingly different process technologies are hitting a wall. So, simple scaling doesn’t apply anymore.”
The needed to use an epitaxial deposition tool was also an inhibition on the uptake of MST. “Historically what people wanted to do was shrink without requiring new tools,” said Mears. An epitaxial deposition tool is required to lay down the oxygen monolayers but the MST process is now supported on epi tools from Applied Materials, ASM and Kokusai Electric.
“Analog and power chipmakers were familiar with using ‘epi’ for bipolar transistors but when we started with CMOS, epitaxial deposition was not used,” said Mears. But increasingly it is being adopted at the leading-edge for compressive strain in source and drain and for silicon-germanium in the [transistor] channel, Mears stated. As a result, epitaxial deposition is becoming mainstream for transistor devices. This has removed another barrier to adoption.
Above all, the benefits from enhanced mobility and precision dopant positioning are becoming greater as geometries shrink. Reportedly the potential benefit in mobility from the use of MST in FinFETs is 10 percent. In GAA it advances to 15 percent or more. The potential performance benefit from dopant engineering in FinFETs is 15 percent but is 20 percent in GAA.
GAA and DRAM
“We are working with half of the world’s top semiconductor producers today and we have been doing work in GAA and in DRAM,” said Mears. In these two fields the number of players is small, but Lewis said: “There’s nothing we can announce.”
The company’s business model is based on technology licensing and royalties. As such the extended period gaining traction with the market has allowed Atomera to build an extensive patent portfolio with which to protect its technology. Since 2016 the company has filed more than 200 patents. This compares with 107 patents the company filed in the 13 years from 2003 to 2015. This should provide Atomera with patent protection into the 2040s.
The company has a set of white papers available from its website covering the advantages of MST in gate-all-around processes at 3nm/2nm, for switches in PMIC and RFSOI and in sense amplifiers for DRAM. There are also links to numerous peer-reviewed technical papers presented at conferences over many years.
“We’re working on some of the biggest problem areas that face logic and memory,” said Lewis.
In addition to the previous:
"...they doubled down on their position in q2, can't tell what their avg cost is but one can assume they have a lower average than most. They started their position in q3 2022, 13f filings really only tell what is owned on the last day of the quarter,..."
Apparently, they doubled their position a few months ago after initiating a position one year ago.
FWIW- Interesting post on ST:
"Jacob Asset management has 1.67% of their portfolio in Atom. While that is probably less than anyone reading this, it's pretty big for an institutional investor. They have a few different funds, their ownership in Atom is not index related. They own Atom in their "Jacob Internet Fund" described as: The Jacob Internet Fund seeks to provide its investors with above average total returns from a select group of companies within the Internet and technology sector that the Fund believes has significant growth potential. To achieve this goal, the Fund looks to own companies with, in their opinion, sustainable competitive advantages that may allow them to generate above average returns on capital over long periods of time. "
The following observation is also somewhat compelling:
"Atom is the ONLY pre revenue company in this fund. Seems like they are pretty confident that will change in the not too distant future."
Disclaimer: I have not verified the claims nor done any DD on Jacob Asset Management- I have, however, no reason to doubt the poster as previous posting have been considered reliable to my satisfaction.
$ATOM to release Q3 earnings on November 8th after market close (per TDAmeritrade/Schwab)
Today's action looks like a little covering taking place. (Spike on low volume)
Company is active on media all of a sudden- shorts smelling news?
News (from Atomera's website): Boosting Semiconductor Performance With Quantum-Engineered Materials
Atomera-a semiconductor materials and technology licensing company, is the newest member of the ESD Alliance. In welcoming Atomera to our membership, I spoke with Atomera CEO Scott Bibaud to learn more about its atomic-level technology that enhances transistors to improve performance in electronic products. We also discussed quantum-engineered materials and their impact on chip performance, recruiting and industry trends.
Smith: The Atomera website highlights quantum-engineered materials. Can you elaborate on what a quantum-engineered material is and why it is different than other materials?
Bibaud: We consider a material to be quantum-engineered when it is first designed using quantum-mechanical ab initio simulations that identify the required material properties. This is in contrast to most materials in use in the semiconductor industry, which are either known in nature or developed empirically. Atomera’s MST® (Mears Silicon Technology™) is an example of a bottoms-up quantum-engineered material as are others such as ReRAM/MRAM memory elements, quantum wells/dots, and high-K metal gate (HKMG) metal stacks.
Smith: How do quantum-engineered materials improve chip performance? What steps does a fab need to take to integrate quantum-engineered materials?
Bibaud: Quantum-engineered materials are used in a variety of applications and can provide benefits in chip power, performance, area, and cost (PPAC) and memory storage performance. Integration into the fabrication process depends on where the material is used. In each case, the overall system benefit must be assessed against the change in manufacturing cost – significant changes are only merited if they provide significant benefits.
HSIf the physical and electrical properties of the quantum-engineered material closely resemble the baseline semiconductor material such as silicon, there is often a straightforward integration path into conventional manufacturing processes. However, the quantum-engineered features may subtly alter the interactions with electrical dopants and semiconductor point-defects. In a material such as MST, this enables high-precision control of doping profiles and reduces surface roughness scattering at adjacent dielectric interfaces. The improved dielectric interface further facilitates improvement in wafer-level reliability.
To take advantage of these parametric benefits, an epitaxial* step must be inserted into the flow, either as a blanket deposition on the starting substrate (for a restricted set of flows) or selectively during the front-end process steps. Typically, implants also need to be re-optimized.
Smith: Design and fabrication have been unconnected parts of the semiconductor flow. Do you see that changing or evolving?
Bibaud: This has been changing for several years now. Nearly all FinFET nodes were designed using a DTCO (Design and Technology Co-Optimization) technique whereby design experts work in parallel with the process development team to determine the PPAC benefits of the process and suggest critical optimizations to improve this metric.
The introduction of quantum-engineered materials such as Atomera’s MST works in a similar way in that it requires close collaboration between the material vendor and the customer’s process development team. This ensures that the customer can derive the maximum benefits and ROI by employing quantum-engineered materials.
Smith: Staffing shortages are a huge problem for the semiconductor industry. How are you addressing the recruiting and hiring challenges?
ImageBibaud: Since our material is applicable to a wide variety of processes from legacy 180nm to the latest gate-all-around and DRAM, we seek people who are experienced with both the intricacies of semiconductor processing as well as the impacts on the device and the end products. Therefore, we typically hire extremely experienced people from the major IC companies as well as from the EDA and IP companies focused on transistor-level design. Like the rest of the semiconductor industry, we see the critical need for workforce development to support our industry.
Smith: What technology trends are you seeing?
Bibaud: The major trend we see is the enormous power needs of AI running up against the slowdown in device scaling.
The rate of AI adoption is accelerating the proliferation of expensive, power-hungry GPUs, high-bandwidth DRAMs, and other data center devices. Unfortunately, this is coupled with the end of the easy scaling era of Moore’s Law, whereby PPAC improvements are becoming much more difficult and expensive to achieve. This is especially true in gate-all-around (GAA) devices, which have become so difficult to develop that an ecosystem of suppliers is emerging to provide tools, materials, and process modules to enable these devices. The result is that AI-based workloads are consuming a measurable part of the world’s total electric production.
HSThis would be (marginally) acceptable if this power consumption was all doing useful work. But it isn’t – there is a lot of waste. And one of the primary causes of the waste is the little-understood issue of random dopant fluctuation, or RDF. RDF is the primary cause of transistor variability, and this variability determines how much voltage scaling can be applied to GPUs, CPUs, and nearly all other processors. It also degrades the refresh interval in DRAMs. DRAM refresh accounts for 10%-15% of total server power today and is increasing; halving the RDF in the sense amps could cut refresh power by more than 2x.
A relatively easy solution for RDF-caused power waste might be to make device sizes larger. This would reduce mismatch but it is the opposite of scaling.
The industry needs a better solution to minimize RDF. Currently, alternative methods such as carbon pinning, counter-doping, and lower-temperature processing steps are being deployed to mitigate the issue. While they do offer some improvements, these approaches aren’t effective enough. The good news is that advanced quantum-engineered materials are showing very promising results in addressing RDF.
*Epitaxy is a type of material deposition in which the deposited layers maintain the same orientation as the crystalline seed layer.
About Scott Bibaud
Scott Bibaud is President, Chief Executive Officer and a director of Atomera, a role he assumed in 2015. Bibaud has been active in the semiconductor industry for more than 25 years and successfully built a number of businesses in his career that grew to generate over $1 Billion in revenue at some of the largest semiconductor companies. Most recently, he was Senior Vice President and General Manager of Altera’s Communications and Broadcast Division. Prior to that, he was Executive Vice President and General Manager of the Mobile Platforms Group at Broadcom. Bibaud holds a B.S. degree in Electrical Engineering from Rensselaer Polytechnic Institute and an MBA from Harvard Business School.
Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.
Topics: Atomera , ESD Alliance , semiconductors , semiconductor design , quantum engineered materials , Workforce Development , talent , FinFET , Design and Technology Co-Optimization , Atomera Mears Silicon Technology , Atomera MST , AI , Artificial Intelligence , gate-all-around devices
Today's (10/09/23) latest blog post- Atomera joins SEMI, SOI Consortium, and ESD Alliance
LD Micro Virtual event The RePlay of Scott's presentation this past Tuesday is now available.
Sign up like you would for any webcast-
ST integration "Imminent" (Scott's word 😉)
New Whitepaper “MST® Benefits for DRAM Sense Amplifiers”
Below is a prelude from Atomera's site and NOT the paper itself. Follow the link above to read the actual paper:
White Paper: “MST® Benefits for DRAM Sense Amplifiers”
By Jeff Lewis, SVP Business Devt. and Marketing
Atomera’s previous white papers have focused on advanced logic, especially gate-all-around (GAA) and nanosheets, and on BCD power devices. Today’s white paper, “MST Benefits for DRAM Sense Amplifiers” is our first paper to describe how MST can also improve memory devices. As many people consider the sense amplifier the “heart” of a DRAM chip, any improvement here can reap significant benefits.
The white paper describes recent learnings about Atomera’s MST® technology and how it can improve the mismatch inherent in DRAM sense amplifiers. This is becoming a critical issue for the latest DRAMs because bitcell capacitors are hitting their scaling limits and the total stored charge is now declining. Reducing mismatch enables numerous cost- and power-reduction benefits that are becoming critical with the huge use of DRAM in AI-focused datacenters.
The paper first describes how DRAM sense amplifiers work; goes into detail on what causes sense amp mismatch, especially random dopant fluctuation (RDF); how MST enables device designers to create the near-ideal dopant profile to minimize RDF; and concludes with a description of the DRAM product benefits of reduced mismatch.
Craig Hallum Update: Craig Hallum Note on 8/3/23 Buy Rating and $17 Target
Atomera to Present at SISPAD 2023
September 20, 2023--(BUSINESS WIRE)--Atomera Incorporated (Nasdaq: ATOM):
WHO:
Professor Hiu Yung Wong of San Jose University, Robert J. Mears, CTO, and Hideki Takeuchi, Vice President of Engineering of Atomera Incorporated (Nasdaq: ATOM), a semiconductor materials and technology licensing company
WHAT:
In-person presentation of San Jose State’s and Atomera’s joint poster, entitled
"Cryogenic Electron Mobility and Subthreshold Slope of Oxygen-Inserted (OI) Si Channel nMOSFETs"
WHEN:
Wednesday, September 27 from 11 p.m. – Thursday, September 28 12:30 a.m. PDT
Thursday, September 28 from 3 p.m. – 4:30 p.m. JST
WHERE:
Kobe Chamber of Commerce and Industry (KCCI), Meeting Room 1
6-1 Minatojimanakamachi, Chuo-ku,
Kobe-shi, Hyogo 650-8543, Japan
This poster presentation will discuss the new findings of the physical mechanism of why MST® (also referred to as "Oxygen-inserted", or "OI Si", in nMOSFETs channel) provides higher inversion-layer carrier mobility than a regular silicon channel, thus enabling higher ON-state current of CMOS devices compared to the baseline devices. Cryogenic-temperature electron-mobility measurement at San Jose State University revealed that Atomera’s MST film improves surface-roughness scattering by 53% compared to a regular Si channel – a significant result because surface-roughness scattering is typically the dominant mobility barrier in high vertical effective field. In addition, MST improves Coulomb scattering, which is significant at low vertical effective field, by reducing ionized dopant impurities near the gate dielectric. A simple analytical formula to describe the observed mobility behaviors of the MST film has been established for compact modeling.
Atomera to Present at the Benchmark Company’s 2023 TMT One-on-One Conference
August 31, 2023
LOS GATOS, CA / ACCESSWIRE / August 31, 2023 / Atomera Incorporated (NASDAQ:ATOM), a semiconductor materials and licensing company, today announced it will be presenting at the Benchmark Company's 2023 Tech/Media/Telecom (TMT) One-on-One Conference on Thursday, Sept. 14, 2023 at the New York Athletic Club in New York City.
Atomera is scheduled to participate in one-on-one meetings with institutional analysts and investors throughout the day.
Conference participation is by invitation only and registration is mandatory. For more information on the conference or to schedule a one-on-one meeting with Atomera, please contact your Benchmark Company representative, or contact Atomera's investor relations at investor@atomera.com.
About Atomera
Atomera Incorporated is a semiconductor materials and technology licensing company focused on deploying its proprietary, silicon-proven technology into the semiconductor industry. Atomera has developed Mears Silicon Technology™ (MST®), which increases performance and power efficiency in semiconductor transistors. MST can be implemented using equipment already deployed in semiconductor manufacturing facilities and is complementary to other nano-scaling technologies already in the semiconductor industry roadmap. More information can be found at www.atomera.com
Investor Contact:
Bishop IR
Mike Bishop
(415) 894-9633
investor@atomera.com
SOURCE: Atomera
View source version on accesswire.com:
https://www.accesswire.com/779137/atomera-to-present-at-the-benchmark-companys-2023-tmt-one-on-one-conference
New Blog post from the Atomera website:
Published: August 21, 2023
Atomera Patent Portfolio
By Frank Laurencio, CFO
Atomera has built an extensive patent portfolio since its founding in 2001, with our first US patents filed in 2003, and counterparts filed outside the US shortly thereafter. As a technology licensing company, our IP is a critical asset, so in this post I offer some insight into how we built our patent portfolio and how we are leveraging our intellectual property to enhance shareholder value.
Early Patent Activity
When Robert Mears founded Atomera in 2001, he had already invented materials technology that revolutionized long-haul fiber optics, most notably with his invention of the erbium-doped fiber amplifier, or EDFA (you can read the IEEE Spectrum magazine’s write-up on it here). Atomera was based on the idea that similar approaches to doping crystalline substrates could benefit semiconductors. Accordingly, our early patents centered around altering the crystal lattice structure of semiconductor materials. Today we are engaged with semiconductor industry participants to understand how MST might be used in the devices they manufacture. So, while our early Atomera patents addressed concepts such as electron mobility in a MOSFET, our more recent patents cover a wide variety of device architectures that we believe will benefit most from MST.
Lean Years
To understand the timing of patent issuances and expirations, it is useful to look back at how our patent filing activity developed over the years. As the bar chart below shows, Atomera was very active in filing patents in the period from 2003-2007 when we filed 88 patents worldwide. Some of those early patents have started to expire. In the seven years after that (2008-2014), we filed only 14 patents. This was not due to a lack of innovation but was a response to the challenging funding environment faced by semiconductor startups, coupled with the global financial crisis. When the company recapitalized in preparation for our IPO in 2016, patenting activity started to pick up again. Between January 1, 2016 and now and we have filed 237 patents worldwide as compared to 107 patents in the 13 years from 2003-2015 – more than doubling our patent filings in about half as much time.
The number of patents we hold at any point in time can ebb and flow based on when we submit filings, patent office application processing timeframes, and expirations after the 20-year term. The elevated level of patent activity since our IPO provides patent protection into the 2040’s and we intend to continue this strong trajectory.
Our Strategy for Commercializing MST
As a technology licensing company, our business model relies on both our patent portfolio and our proprietary trade secrets. Patents are public documents that anyone can study, but they protect inventions by granting exclusive rights for a limited time period. Trade secrets, on the other hand, safeguard confidential and valuable information that provides a competitive edge. So while our patents protect the devices made using MST and the methods for doing so, the recipes for depositing MST film on wafers are not patented but are protected as trade secrets which we only divulge to customers under strict contractual protections. Unlike patents, which by law are limited to 20 years, trade secrets have no expiration. When we enter into a license agreement with a customer, we license both our patents and trade secrets to them – both types of IP are necessary for a customer to capitalize on the benefits of MST.
As Atomera has evolved from our roots in basic materials science to a value-add partner for semiconductor makers, our patents and know-how have also broadened to protect our innovations in the many areas that benefit from MST Technology.
Our engineers continue to innovate and protect their inventions with our powerful combination of patents and trade secrets, both in the areas we currently focus on and in new, related fields. Atomera is a very different company today than when we started out focused on basic materials science. We are engaged with companies across the full range of semiconductor process technologies and we have the patents and know-how covering our innovations in those areas, providing a much stronger and more valuable set of IP assets on which to build our licensing business.
Whoa, looks like there is a boat-load of shtuff going on in the background. Great DD by this poster (among a core group of a few others)
crheat
Yesterday 3:46 PM
$ATOM Samsung Joint Development.
Looks like Samsung getting involved with the research Atomera has been doing with Hiu Yung Wong at San Jose state for cryogenic modeling of MST devices.
Since 2018, Hiu Yung Wong has received grants from government agencies but no other semiconductor companies aside from Atomera, Synopsys, AMAT, and now Samsung. Bullish
joedab12
Yesterday 7:27 PM
@crheat Scott has been talking about industry standard/semiconductor roadmap/eco system for a long time now. He definitely isnt lying.
Zoom call summary from TW_Research (Dan) with Atomera on June 26, 2023
Dan started the call off by asking Scott about the current status with STM. Scott replied that:
“We are actively working with STM in integration. The next announceable event is when STM actually installs on their tool which will then trigger a mile-stone payment and at that time we will be able to announce. The holdup right now is logistics on STM’s end as to when they can modify their tool and do the installation. Once started (actual install), it does not take long—maybe a day or two. Both sides (STM & ATOM) are excited to begin the process.”
Scott went on to say that they (ATOM) began working with STM in 2018 and that STM stated to Atomera that this (MST) was something “they were going to use”. STM at the time (2018), was in a new design phase for their ‘Smart Products’ and why they were so interested in MST. Scott went on to explain why that was so important.
“Companies (in the chip business) do not like or want to implement new changes on a current tool in existing designs and/or volume runs”, so they wait for the next cycle or turn/design to make wholesale changes.
{STM in 2018 was in the preliminary stages of a tool upgrade process for their Smart Products so the timing appears to be quite fortuitous for ATOM}
Dan asked: “What constitutes STM’s ‘Smart Products’? Is it a single chip design or what?”
Frank replied that it is not a single design but a family of products we think in a division of STM called AMS, which stands for Analog, Mems, and Sensors. “This division brought STM last Q $1.1 billion which is approx 20-25% of STM’s total world-wide revenue.”
Dan then asked if there had been any increased awareness since the STM deal. (This is what I referred to weeks ago when I posted my thoughts about the deal myself- I called it “pin action”) Scott answered that “it did generate renewed enthusiasm for customers to take another look and review Atomera’s stuff again.” He went to say that it was especially enticing for those customers “especially in the power area”. These folks were particularly interested because STM is an innovation leader in the power area- so their (STM) endorsement of Atomera’s technology means a lot.
Scott later says that “it is a big deal when they (ATOM) tell other customers that STM is taking MST into production- and it will be a bigger deal when they actually go into production.” He sees a big attitude change of incoming customers due to the STM deal.
JDA#1 Large outfit and they (ATOM) are currently working with “several divisions” within that company.
JDA#2 Atomera did not meet mile-stones on their run. They have since re-run the wafer runs and are still awaiting the results.
Fabless customer- Also doing wafer runs but it’s a different type of testing in the RF space.
Question then asked about first to market/production—RFSOI still the front runner? Scott admitted in the past he thought RF might be the first. However, given STM’s current license status, it appears that ‘Power’ may, in fact, be first to market. He did caution, however, “we have several other people who could potentially move very quickly.”
Scott also touched on the lack of “new” news- he stated he’s well aware of the frustration with the fact they (ATOM) can’t put news out and that he sympathizes with that. “If we could put out more news, it would take the pressure off us.” But, it’s not their call…yada, yada, yada.
Dan asked about the auto-sell program in place for tax purposes and any thoughts on maybe doing something different so the market wouldn’t view it so negatively.
Scott made three points about why they use the current program:
1) First and foremost, they evaluated the different types available but thought it best to go with something that rules out any possible suggestion of insider trading.
2) They (Atom principals) “don’t make enough in salary to cover the taxes.” Scott went further in stating that only once since 2016 (and it was in 2016) has he ever sold a share of stock- and that one time (2016), it was a “special event.” (He did not elaborate)
3) Given that Atom is a microcap with little news, they are deliberately avoiding buying or selling of shares because they “are cognizant of the potential impact on the market.”
Talk then ensued regarding the CHIPS Act:
Power technology=big business= Lots of legacy devices.
Atomera themselves are not actively working with the government currently, but continues to brief them- (whatever that means). The legacy companies themselves, however, could receive government money for R&D and perhaps facility costs.
Amitabh Sharma had two questions:
1) “Any appetite from STM folks to do a PR on their side with the partnership with ATOM?”
Short answer- No. Various reasons but the one that stood out was that because STM is a large company (world-wide) and any PR or NR requires all IR and PR people to be brought up to speed. To go through the expense and time to write up a PR doesn’t make sense if they can’t answer what’s in it for them.
2) “Do you feel you have similar senior level conversations with the other potential partners?”
Yes. (emphatic but no elaboration)
My take is that Atomera (MST) is NOT a "if", but a "WHEN". I still subscribe to my previous convictions (and posts) after signing the STM deal, that it will be "pin-action" process that drives growth in Atomera. And then it will snowball. The $million dollar question is when does it start? Their first production run regardless whether it's power, or, RFSOI will be ground zero imo.
<blockquote class="twitter-tweet"><p lang="en" dir="ltr"><a href="https://twitter.com/search?q=%24ATOM&src=ctag&ref_src=twsrc%5Etfw">$ATOM</a>; Atomera.<br><br>Samsung Electronics announces plan to push into the power semiconductor space<br><br>Korea's semiconductor giant Samsung Electronics plans to challenge the European dominance of the power semiconductor secto... <a href="https://t.co/wl4vT6RtUx">https://t.co/wl4vT6RtUx</a></p>— joe iniowa (@Microcapreturns) <a href="
12, 2023</a></blockquote> <script async src="https://platform.twitter.com/widgets.js"; charset="utf-8"></script>$ATOM Atomera.
— joe iniowa (@Microcapreturns) July 12, 2023
Samsung Electronics announces plan to push into the power semiconductor space
Korea's semiconductor giant Samsung Electronics plans to challenge the European dominance of the power semiconductor secto... https://t.co/wl4vT6RtUx
