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Re: tatertot post# 105189

Saturday, 10/15/2011 11:23:40 PM

Saturday, October 15, 2011 11:23:40 PM

Post# of 151772
I find it disgusting how JF is trying to transfer the egg on his
face to nameless, faceless AMD engineers. The engineers
who worked on BD were pretty straight forward in their ISSCC
and Hotchips papers that they were emphasizing frequency
and throughput over IPC. Comments like:

http://www.anandtech.com/Gallery/Album/754#3

"Designed for knee-of-the-curve IPC features and low gates/clock"

http://www.anandtech.com/Gallery/Album/754#6

"Throughput advantages for multi-threaded workloads without
significant loss on serial single-threaded workload components"

JF repeatedly publicly denied this implication of those technical
papers written and presented by AMD engineers and insisted up
and down that IPC would increase over the K10 processor family.
Here is a pretty clear example in this thread:

http://aceshardware.freeforums.org/amd-bulldozer-preview-t1042-150.html
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