Friday, November 10, 2017 3:33:18 AM
Well, I am not so much into those transistor/per area figures. They don't tell you much in my opinion. For instance, a cache can be of very high density compared to a CPU core, especially one that is trimmed towards high clock frequencies. In the end, all that matters is achieved performance relative to die size. Performance per area matters in the end, at least when it comes to server processors. Qualcomm has to pay for every square mm of its design and they compete in performance, not density or whatsoever.
If you really would want to compare the densities of the processes, then you would try to estimate the area of some integrated SRAM, since that is fairly easy to spot, and compare the cache size figures in relation to the area of that SRAM (which mainly will consist of the cache on a CPU). This would give you an indication of the actual process density, since SRAMs typically are the most dense circuits.
Having said that, the resulting density depends on more than just what the process delivers. You can use a lot of design tricks to make memories more dense that are only partially related to the process and also the tools matter a lot when it comes to efficient layouting of the circuit. Raw figures of the process are only a (large) part of the equation.
Edit: I think I already posted it, but AMDs Zen actually packs 8MB cache into 16mm2 compared to Intel packing its 8MB cache into 19mm2. Intel always claimed how inferior the competitor's 14nm processes are (in the case of AMD, it is Globalfoundries/Samsung), but when it comes to actual designs, nothing of this seems to hold true. There is no process lead for Intel anymore. It's gone. AMD already has access to the same 10nm process as Qualcomm has. Intel can't just push them out of the market this time like they did in the past. They were moving way too slow and now are going to pay for it.
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