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Thursday, 11/10/2016 1:38:51 PM

Thursday, November 10, 2016 1:38:51 PM

Post# of 6137
Patents Update (found this info posted on the agoracom site)

Optoelectronic integrated circuit
Patent number: 9490321
Abstract: A semiconductor device includes a substrate supporting a plurality of layers that include at least one modulation doped quantum well (QW) structure offset from a quantum dot in quantum well (QD-in-QW) structure. The modulation doped QW structure includes a charge sheet spaced from at least one QW by a spacer layer. The QD-in-QW structure has QDs embedded in one or more QWs. The QD-in-QW structure can include at least one template/emission substructure pair separated by a barrier layer, the template substructure having smaller size QDs than the emission substructure. A plurality of QD-in-QW structures can be provided to support the processing (emission, absorption, amplification) of electromagnetic radiation of different characteristic wavelengths (such as optical wavelengths in range from 1300 nm to 1550 nm).
Type: Grant
Filed: November 20, 2014
Date of Patent: November 8, 2016
Assignees: THE UNIVERSITY OF CONNECTICUT, Opel Solar, Inc.
Inventor: Geoff W. Taylor

Fabrication methodology for optoelectronic integrated circuits
Patent number: 9490336
Abstract: A method of forming an integrated circuit includes depositing a multilayer metal stack on at least one contact layer of semiconductor material. The multilayer metal stack includes a bottom interface layer formed by a combination of indium and at least one high temperature metal on the at least one contact layer of semiconductor material, at least one barrier layer formed on the bottom interface layer, and a layer formed from at least one high temperature metal on the at least one barrier layer. The metal stack is heated such that indium of the bottom interface layer forms a low resistance interface to contact layer. The at least one barrier layer functions as a barrier to diffusion of indium from the bottom interface layer. Subsequent to the heating, the resultant multilayer metal stack can be patterned to form at least one electrode for a given device of the integrated circuit.
Type: Grant
Filed: June 11, 2015
Date of Patent: November 8, 2016
Assignees: Opel Solar, Inc., THE UNIVERSITY OF CONNECTICUT
Inventor: Geoff W. Taylor

Rick, what are your thoughts on these patents, how do they play into other news flows here and elsewhere, ie intel's new proof of concept chip? tia
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