Mosaic ImmunoEngineering Inc (CPMV)

[earplug]

Nice try at explaining,, but you got it wrong..

"""Note the underlined buddie. ADJUSTS THE OSCILLATOR. The PLL is an off chip CONTROL SIGNAL mechanism to adjust the on chip oscillators frequency and this is not at all allowed under Judge Grewal's new claims construction.

This is how all the defendants chips function at all they have the PLL modulating the frequency of the on chip oscillator. Read what the judge said below yesterday in his Markman ruling and weep!"""
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https://en.wikipedia.org/wiki/Ring_oscillator

Ring oscillator

Ring oscillators fabricated on silicon using p-type MOSFETs.


A schematic of a simple 3-inverter ring oscillator whose output frequency is 1/(6×inverter delay).

A ring oscillator is a device composed of an odd number of "NOT" gates whose output oscillates between two voltage levels, representing true and false. The NOT gates, or inverters, are attached in a chain and the output of the last inverter is fed back into the first.


Because a single inverter computes the logical "NOT" of its input, it can be shown that the last output of a chain of an odd number of inverters is the logical "NOT" of the first input.

The final output is asserted a finite amount of time after the first input is asserted and the feedback of the last output to the input causes oscillation.

A circular chain composed of an even number of inverters cannot be used as a ring oscillator. The last output in this case is the same as the input. However, this configuration of inverter feedback can be used as a storage element and it is the basic building block of static random access memory or SRAM.

The stages of the ring oscillator are often differential stages, that are more immune to external disturbances. This renders available also non-inverting stages. A ring oscillator can be made with a mix of inverting and non-inverting stages, provided the total number of inverting stages is odd. The oscillator period is in all cases equal to twice the sum of the individual delays of all stages.

A real ring oscillator only requires power to operate.

Above a certain threshold voltage, oscillations begin spontaneously.
To increase the frequency of oscillation, two methods are commonly used.

Firstly, the applied voltage may be increased. This increases both the frequency of the oscillation and the current consumed. The maximum permissible voltage applied to the circuits limits the speed of a given oscillator.

Secondly, making the ring from a smaller number of inverters results in a higher frequency of oscillation given a certain power consumption.

Operation

To understand the operation of a ring oscillator, one must first understand gate delay. In a physical device, no gate can switch instantaneously.

In a device fabricated with MOSFETs, for example, the gate capacitance must be charged before current can flow between the source and the drain. Thus, the output of every inverter in a ring oscillator changes a finite amount of time after the input has changed. From here, it can be easily seen that adding more inverters to the chain increases the total gate delay, reducing the frequency of oscillation.


A transistor level schematic of a three-stage ring oscillator with delay in a .25u CMOS process.
The ring oscillator is a member of the class of time delay oscillators. A time-delay oscillator consists of an inverting amplifier with a delay element between the amplifier output and its input. The amplifier must have a gain greater than 1 at the intended oscillation frequency. Consider the initial case where the amplifier input and output voltages are momentarily balanced at a stable point. A small amount of noise can cause the amplifier output to rise slightly. After passing through the time-delay element, this small output voltage change will be presented to the amplifier input. The amplifier has a negative gain of greater than 1, so the output will change in the direction opposite to this input voltage. It will change by an amount larger than the input value, for a gain greater than 1. This amplified and reversed signal propagates from the output through the time-delay and back to the input where it is amplified and inverted again. The result of this sequential loop is a square-wave signal at the amplifier output with the period of each half of the square wave equal to the time delay. The square wave will grow until the amplifier output voltage reaches its limits, where it will stabilize. A more exact analysis will show that the wave that grows from the initial noise may not be square as it grows, but it will become square as the amplifier reaches its output limits.

The ring oscillator is a distributed version of the delay oscillator. The ring oscillator uses an odd number of inverters to give the effect of a single inverting amplifier with a gain of greater than one. Rather than having a single delay element, each inverter contributes to the delay of the signal around the ring of inverters, hence the name ring oscillator. Adding pairs of inverters to the ring increases the total delay and thereby decreases the oscillator frequency. Changing the supply voltage changes the delay through each inverter, with higher voltages typically decreasing the delay and increasing the oscillator frequency. Vratislav describes some methods of frequency-stability and power consumption improving of the CMOS ring-oscillator.[1]

If 't' represents the time-delay for a single Inverter and 'n' represents the number of Inverters in the Inverter chain, then the frequency of oscillation is given by

f = {\frac{1}{2*t*n} }.[2]

Jitter[edit]

Period of ring oscillator vibrates in a random manner T=T+T' where T' is a random value. In high-quality circuits, the range of T' is relatively small compared to T. This variation in oscillator period is called jitter.[3] Local temperature effects cause the period of a ring oscillator to wander above and below the long-term average period.[4] When the local silicon is cold, the propagation delay is slightly shorter, causing the ring oscillator to run at a slightly higher frequency, which eventually raises the local temperature. When the local silicon is hot, the propagation delay is slightly longer, causing the ring oscillator to run at a slightly lower frequency, which eventually lowers the local temperature.

Applications[edit]
The voltage-controlled oscillator in most phase-locked loops is built from a ring oscillator.[5]
Jitter of ring oscillators is commonly used in hardware random number generators.[3][4][6]
A ring oscillator is often used to demonstrate a new hardware technology, analogous to the way a hello world program is often used to demonstrate a new software technology.[7][8]
Many wafers include a ring oscillator as part of the scribe line test structures. They are used during wafer testing to measure the effects of manufacturing process variations.[9]
Ring oscillators can also be used to measure the effects of voltage and temperature on a chip.[10]
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There is NO OFF CHIP devise controlling the ring oscillator..
It is .."SELF", regulated by, simply, feeding the output of the 'RING' back to the input, in what is called a feedback loop,
...(Phase lock loop)...[= PLL]

The post I included will explain it nicely, if you ,"GET" it..

You are not the only one to , 'get it mixed up'..

Hopefully you will 'LEARN'something here..

PS FYI
http://www.google.com/webhp?nord=1#nord=1&q=MOSFET