Friday, March 27, 2015 9:00:46 PM
Interesting though that the article speaks of Toshiba shipping in the 1st half of 2016... Also, Toshiba will be moving backward in process to 30nm, 40nm, 50nm so as to utilize less expensive process. This will obviously impact the overall density of the NAND. One last point was that the Toshiba solution was for MLC (2 bits) vs TLC (3 bits)... TLC would follow later...
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