Thursday, November 20, 2014 4:21:48 PM
Intel has essentially taken a segmentation strategy, and multiplied it out with baffling complexity. Just look at the hyper-proliferation of their Xeon-EP line, which takes their scalable ring fabric to create three separate core count and bandwidth optimized designs, while creating nearly 2 dozen combinations of cores, frequency, cache, and TDP combinations, at price points spanning more than two orders of magnitude.
http://www.anandtech.com/print/8730/intel-haswellep-xeon-14-core-review-e52695-v3-and-e52697-v3
ARM vendors can try to find a crack in that wall of product options, but here are a few things to keep in mind.
- Intel's single threaded scalar performance is absolutely unassailable, and as much as some people will try to deny it, some workloads continue to be bottlenecked by this
- Intel's per socket multithreaded performance is absolutely unassailable. They've built reticule-sized die (662 mm2 of die area and 5.7B transistors) towards maximizing the conceivable core count and bandwidth out of a single SOC. We've seen claims of monstrous core counts from some ARM vendors, but no proof of concept that anything could be built and scale in performance to assail Xeon's per socket multithreaded performance.
- ARM's value prop seems to depend on workloads that can be chopped up to run in small units, independently, across multiple server nodes, then aggregated into useful throughput. The ARM bulls here seem to think that all server workloads fall into that category, while the reality is that only a portion of the market is up for grabs. Moreover, it's unclear that having 2x or 4x as many SOCs at the same power is necessarily better, if those SOC's deliver 1/2 or 1/4th (respectively) the amount of throughput per Intel equivalent socket.
Back to Intel's hypersegmentation model, Xeon-EP may not be the best solution for every server problem, but that seems to be why Intel is also investing in multiple other server architectures, including Atom-based micro-server SOC's, mission-critical based Xeon-EX based designs, and even future expected Broadwell micro-server SOC's.
It seems that whatever the usage model, or expected value equation from the market, Intel has their bases covered. It's as much a solid strategy as I've ever seen in a product portfolio. A job well done by their DCG business unit!
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