No doubt TSMC is now very aggressive with their process roadmap. Here's what I've been able to mine online.
20nm: Claimed vs. 28nm: 1.2x perf, 1.3x power redux, 1.9x density - Risk production Q2'13, Volume production Q1'14, Qualcomm modem Q2'14, Apple A8 Q3'14
16nmFF: Claims 1.4x perf and ISO-area vs. 20nm - Risk production Q4'13, Expected volume production Q1'15, Expected Apple A9 Q3'15...?
16nmFF+: 1.6x perf and 0.85 die size reduction vs. 20nm - Design kits ready April, with additional roll-out in May, July. No specifics on risk or volume production - (my comment) Can't see this being all that popular, unless it refreshes a few designs in H1'16, or if 10nm is delayed
10nm: Claimed vs. 16nmFF+: 1.25x perf, 1.45x power redux, 2.2x density - Vs. 28nm: ~2x perf, 0.5x power, ~5x density - Average CAGR per node (out of 3 nodes): 1.25x perf, 0.8x power, 1.7x density - Product tapeouts and risk production end of 2015, goal of customer product launches in 2016
7nm: No data on benefits - Targeting mid-2017 risk production, 6 months earlier than 2-year cycle
What this says is that TSMC plans to provide 3.5 process nodes in 3 years (20/16/16+/10 in '14/'15/'16), and 4.5 process nodes in 5 years (add 7nm and '18).
This is a roadmap that ought to catch up to Intel's cadence. So it should be as easy as a walk in the sunshine for them.
