$GTCH broadening its 3D, multiplanar, integrated circuits design and manufacturing continuation patent application, responding to an United States Patent and Trademark Office (“USPTO”) office action. GBT will also seek to protect the original patent’s concepts focusing on semiconductor wafers mounting on vertical and horizontal planes. The original invention design presents a new way to design and manufacture larger size integrated circuits (ICs) to fit advanced analog, digital and mixed IC types on a silicon wafer. The technology that was subject to the patent sought to enable the advanced microchip design and manufacturing within significantly less space which can be a major factor for IC’s manufacturing, performance and cost. It is thought that the invention can be a game changer particularly for integrated circuits that require vast amount of silicon space like memories, CPU, GPU and AI. The Company’s 3D microchip patent was filed on March 5, 2019, and was granted as of December 1, 2020 by the USPTO; U.S. Patent No. 10,854,763. The continuation application, assigned number 17102928, was filed on November 24, 2020. The Company’s intent in filing the continuation is to broaden the protection of its main IP concepts. It is GBT’s goal to further develop advancements in this domain through the use of the 3D, multidimensional design, utilizing more space on the silicon wafer, enabling manufacturing of larger ICs, with higher performance, lower power consumption and cheaper. This technology can be particularly advantageous for fabless design houses to design advanced microchips with much lower cost.
“We continue to seek to broaden our 3D, multiplanar chip IP with our continuation application. One of the major areas that we plan to enhance is the mount planes of the semiconductor wafers. We believe the idea of mounting on vertical and horizontal planes creates a whole world of possibilities when designing and manufacturing multiplanar microchips. If successfully implemented, we believe these chips will be able to contain more circuitries, operating with higher performance and consuming less power. We believe this is an innovative concept, designed to be accompanied with scaling down ICs size to fit into smaller electronic devices. Redesigning and manufacturing microchips with multiplanetary architecture would enable placing more circuitries on same or smaller space silicon dies, which would expect to significantly lower their cost. The 3D microchip continuation application is planned to broaden the original patent with design and fabrication concepts. With the ever-growing microchip’s complexity, demand for less power, faster performance and smaller size, we believe that the presented patent’s technology can be an efficient solution, enabling economical IC’s design and manufacturing, creating new horizons and standards,” provided Danny Rittman, the Company’s CTO.
