Thursday, August 23, 2018 7:01:54 AM
Only transistor density matters.
Intel 10nm achieves a transistor density of
100 Million/mm^3 = 10^8 mm^-3 That is a 2.7 increase from 14nm.
That will also increase, even at 10nm format.
Now, 2.7 = (14nm/10nm)^3. So Intel's transistor density scales
as volume^-1, which is what "full volume shrink" means.
[[Do you understand the concept of scaling? ]]
In comparison, TSMC transistor density at 7nm is **estimated**
at 116 Million/mm^3, and Samsung at 127 Million /mm^3.
[[These are semiwiki estimates...
https://www.semiwiki.com/forum/content/6713-14nm-16nm-10nm-7nm-what-we-know-now.html . Note that Semiwiki overestimates, eg they
quote Intel at 103 when it is 100.8; I'd like to hear what Intel says are the TSMC and SS densities; until then its fake news]]
7nm is not yet shipping in CPU's.
Intel's 10nm is shipping in mobile Cannonlake CPU's.
Therefore, these numbers for TSMC and Samsung at 7nm are
comparable to Intel at 10nm transistor density. In fact
the TSMC and SS ARE just 10nm. Claiming its 7nm and not
10nm is a lie.
If they were true volume shrinks these densties should be larger
by another be a factor of (10nm/7nm)^3 = 2.8 .
ie TSMC and SS should be at densities of about 300 M mm^-3.
They aren't. The claim others lead Intel process is BS.
Volume shrink is the only honest shrink. Intel is not only achieving it, but they are paving the way to do it again at other node
scales, such as honest 7nm and honest 5nm.
The moderators only allow me one post per day. That's great
as it moderates me from wasting time interacting with clowns such as yourself. You should go read some basic math books, and get your
nose out of Investors Business Daily.
Intel at 10nm should be compared to "others" 7nm.
They are shipping. The "others" are not (in CPU's).
This tempest in a tea cup is Demerjian-Ragson-Essa balderdash
and presents a great buying opportunity for INTC.
Intel 10nm achieves a transistor density of
100 Million/mm^3 = 10^8 mm^-3 That is a 2.7 increase from 14nm.
That will also increase, even at 10nm format.
Now, 2.7 = (14nm/10nm)^3. So Intel's transistor density scales
as volume^-1, which is what "full volume shrink" means.
[[Do you understand the concept of scaling? ]]
In comparison, TSMC transistor density at 7nm is **estimated**
at 116 Million/mm^3, and Samsung at 127 Million /mm^3.
[[These are semiwiki estimates...
https://www.semiwiki.com/forum/content/6713-14nm-16nm-10nm-7nm-what-we-know-now.html . Note that Semiwiki overestimates, eg they
quote Intel at 103 when it is 100.8; I'd like to hear what Intel says are the TSMC and SS densities; until then its fake news]]
7nm is not yet shipping in CPU's.
Intel's 10nm is shipping in mobile Cannonlake CPU's.
Therefore, these numbers for TSMC and Samsung at 7nm are
comparable to Intel at 10nm transistor density. In fact
the TSMC and SS ARE just 10nm. Claiming its 7nm and not
10nm is a lie.
If they were true volume shrinks these densties should be larger
by another be a factor of (10nm/7nm)^3 = 2.8 .
ie TSMC and SS should be at densities of about 300 M mm^-3.
They aren't. The claim others lead Intel process is BS.
Volume shrink is the only honest shrink. Intel is not only achieving it, but they are paving the way to do it again at other node
scales, such as honest 7nm and honest 5nm.
The moderators only allow me one post per day. That's great
as it moderates me from wasting time interacting with clowns such as yourself. You should go read some basic math books, and get your
nose out of Investors Business Daily.
Intel at 10nm should be compared to "others" 7nm.
They are shipping. The "others" are not (in CPU's).
This tempest in a tea cup is Demerjian-Ragson-Essa balderdash
and presents a great buying opportunity for INTC.
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