Intel Corp (INTC)

[Unkwn]

Will soon? This sort of thing has been going on for quite a while already and the main thing TSMC itself would be worried about now as far as 16FF+ is concerned is their yield and ramp.

The timeline is like two years before production they have to have the EDA companies in to start implementing the design rules in their software and introduce early adopters to the process. During the year before they have risk production where they have early tape outs of various IP and designs and fix problems in the design rules and process and make sure their characterizations are okay.

First of all, we talk about the redesigns of TSMC's customers. They have to redesign their full-custom cells and, as it seems, for Finfets that is a completely different animal. For sure TSMC has simulation models for their Finfet transistors in place already, but how accurate are they? How often will the OEM have to redesign some of the most complex analog parts on its SoC until it actually works in reality and how often will TSMC have to refine their cell library until it supports simulation of all sorts of analog circuitry? This is not yet another planar process. I bet unlinearities are completely different, parasitics behave different etc. To get a cell simulation model that is completely accurate for all types of analog circuitry isn't a one shot thing - that takes time.

Don't forget that Intel is working with Finfets already for some years since their introduction of their 22nm process. I guess some of the integration issues for their own mobile SoCs, especially for the modem part, are related to that. On the other hand, that makes Intel have quite some lead time compared to TSMC and Samsung OEM's that want to switch to Finfet designs now. Maybe we'll have some surprises regarding delays for fully integrated mobile SoCs by ARM vendors. We'll see ...